MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 169

• Manufacturer Part Number: MC68360VR25VL
• Description: IC MPU QUICC 25MHZ 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68360VR25VL

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

the result is 0, the condition is false. For example, the T condition is always true, and the EQ
condition is true only if the Z-bit condition code is true. Table 5-12 lists each condition test.
5.3.4 Using the TBL Instructions
There are four TBL instructions. TBLS returns a signed, rounded byte, word, or long-word
result. TBLSN returns a signed, unrounded byte, word, or long-word result. TBLU returns an
unsigned, rounded byte, word, or long-word result. TBLUN returns an unsigned, unrounded
byte, word, or long-word result. All four instructions support two types of interpolation data:
an n-element table stored in memory and a two-element range stored in a pair of data reg-
isters. The latter form provides a means of performing surface (3D) interpolation between
two previously calculated linear interpolations.
The following examples show how to compress tables and use fewer interpolation levels
between table entries. Example 1 (see Figure 5-7) demonstrates TBL for a 257-entry table,
allowing up to 256 interpolation levels between entries. Example 2 (see Figure 5-8) reduces
table length for the same data to four entries. Example 3 (see Figure 5-9) demonstrates use
of an 8-bit independent variable with an instruction.
Two additional examples show how TBLSN can reduce cumulative error when multiple table
lookup and interpolation operations are used in a calculation. Example 4 demonstrates addi-
tion of the results of three table interpolations. Example 5 illustrates use of TBLSN in surface
interpolation.
* Not available for the Bcc instruction.
+=Boolean OR
N=Boolean NOT
=Boolean AND
Mnemonic
CC
CS
NE
EQ
VC
GE
GT
LS
VS
PL
MI
LT
LE
F*
HI
T
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 5-12. Condition Tests
Greater or Equal
Overflow Clear
Less or Equal
Greater Than
Low or Same
Overflow Set
Carry Clear
Condition
Less Than
Not Equal
MC68360 USER’S MANUAL
Carry Set
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Minus
Equal
False
True
High
Plus
Encoding
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
N V Z + N V Z
Z + N V + N V
N V + N V
N V + N V
C + Z
C Z
Test
C
C
Z
Z
V
V
N
N
1
0
CPU32+