MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 473

• Manufacturer Part Number: MC68360VR25VL
• Description: IC MPU QUICC 25MHZ 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68360VR25VL

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

INIT RX PARAMETERS Command. This command initializes all receive parameters in this
serial channel’s parameter RAM to their reset state. This command should only be issued
when the receiver is disabled. Note that the INIT TX AND RX PARAMETERS command may
also be used to reset both receive and transmit parameters.
7.10.16.7 UART ADDRESS RECOGNITION (RECEIVER). In multidrop systems, more
than two stations may be present on a network, each having a specific address. Figure 7-
47 shows two examples of such a configuration. Frames made up of many characters may
be broadcast, with the first character acting as a destination address. To achieve this, the
UART frame is extended by one bit, called the address bit, to distinguish between an
address character, and the normal data characters.
The UART can be configured to operate in a multidrop environment in which the following
two modes are supported:
Automatic Multidrop Mode—The UART controller automatically checks the incoming
address character and accepts the data following it only if the address matches one of two
preset values.
Nonautomatic Multidrop Mode—The UART controller receives all characters. An address
character is always written to a new buffer (it may be followed by data characters).
Each UART controller has two 16-bit address registers to support address recognition,
UADDR1 and UADDR2. The upper 8 bits of these registers should be written with zero; only
the lower 8 bits are used. In the automatic mode, the incoming address is checked against
UADDR1 and UADDR2. Upon an address match, the M-bit in the BD is set to indicate which
address character was matched, and the data following it is written to the data buffers.
The CLOSE Rx BD command in UART mode does the same job
as the ENTER HUNT MODE command except for one distinc-
tion. The CLOSE Rx BD does not require that a character of idle
be present on the line for reception to continue.
For less than 8-bit characters, the MSBs should be zero.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
NOTE
NOTE
Serial Communication Controllers (SCCs)