MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 33

IC MPU QUICC 25MHZ 357-PBGA

MC68360VR25VL

Manufacturer Part Number
MC68360VR25VL
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor

Specifications of MC68360VR25VL

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

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Part Number
Manufacturer
Quantity
Price
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Part Number:
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Manufacturer:
Freescale Semiconductor
Quantity:
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Part Number:
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Part Number:
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Manufacturer:
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Quantity:
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1.
2.
3.
SDLC is a trademark of International Business Machines.
AppleTalk is a registered trademark of Apple Computer, Inc.
DDCMP is a trademark of Digital Equipment Corporation.
• Four SCCs
• Two SMCs
• One SPI
• Time-Slot Assigner
• Supports Two TDM Channels
—Independent (Can Be Connected to Any SCC or SMC)
—Allows Changes During Operation
—Autobaud Support Option
—Ethernet/IEEE 802.3 Optional on SCC1 (Full 10-Mbps Support)
—HDLC/SDLC
—HDLC Bus (Implements an HDLC-Based Local Area Network (LAN))
—AppleTalk
—Signaling System #7
—Universal Asynchronous Receiver Transmitter (UART)
—Synchronous UART
—Binary Synchronous Communication (BISYNC)
—Totally Transparent (Bit Streams)
—Totally Transparent (Frame Based with Optional Cyclic Redundancy Check (CRC))
—Profibus (RAM Microcode Option)
—Asynchronous HDLC (RAM Microcode Option)
—DCMP
—V.14 (RAM Microcode Option)
—X.21 (RAM Microcode Option)
—UART
—Transparent
—General Circuit Interface (GCI) Controller
—Can Be Connected to the Time-Division Multiplexed (TDM) Channels
—Superset of the MC68302 SCP
—Supports Master and Slave Modes
—Supports Multimaster Operation on the Same Bus
—Each TDM Channel Can Be T1, CEPT, PCM Highway, ISDN Basic Rate,
—1- or 8-Bit Resolution
—Allows Independent Transmit and Receive Routing, Frame Syncs, Clocking
—Allows Dynamic Changes
—Can Be internally Connected to Six Serial Channels (Four SCCs and
ISDN Primary Rate, User Defined
Two SMCs)
3
(RAM Microcode Option)
2
1
(All Four Channels Supported at 2 Mbps)
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
Introduction

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