MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 265

• Manufacturer Part Number: MC68360VR25VL
• Description: IC MPU QUICC 25MHZ 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68360VR25VL

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

32-Bit Address Decode
Address Space Checking
Read/Write Checking
8, 16, 24 and 32 Bit Sizes
Variable Block Sizes
External Masters
6.7 EXTERNAL BUS INTERFACE CONTROL
This subsection describes the method by which the EBI is configured, which includes the
data bus size (either 32 or 16 bits), port D, and port E. Refer to Section 4 Bus Operation for
more information about the EBI.
The BKAR allows a full 32-bit address to be loaded. This address is qualified in various
ways using the BKCR. If no address is desired, the V-bit in the BKCR may be cleared.
The BKCR allows the user to check many combinations of function codes before causing
a breakpoint match. Nine bits in the BKCR allow such possibilities as excluding the IDMA
and SDMA function codes and the user and supervisor programs, but including user and
supervisor data.
The breakpoint logic can cause a breakpoint match for read accesses only, write access-
es only, or both read and write accesses.
The breakpoint logic can cause a breakpoint match for accesses to the specified address
with a size of byte, word, three byte, long word, or any size.
If desired, the breakpoint match can occur in a region larger than just one address. Block
sizes may be defined to be the block of memory in which the address resides. The blocks
sizes may be 2K, 8K, or 32K bytes.
Additionally, the breakpoint match can be defined to occur at every address except the
address or address block that is specified. This feature allows the user to single step all
his program code. The breakpoint logic is then used to mask off the user’s monitor/debug-
ger. The monitor/debugger thus resides within the programmable block specified by the
breakpoint logic.
The breakpoint logic can also work with external masters, such as an external MC68040,
MC68030, or QUICC. The BKPT pin is asserted when a match is detected.
In the case of an external MC68040, the user may have to set the TSS40 bit in the GMR
to allow enough setup time for the address comparison logic. Also, in the case of an ex-
ternal MC68040, the comparison is only made on the first accesses of an MC68040 burst
access (i.e., the address comparison of the breakpoint logic is performed only when the
MC68040 TS pin is asserted).
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
System Integration Module (SIM60)