R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 81
![IC R8C/23 MCU FLASH 48-LQFP](/photos/12/38/123822/r5f21238dfp_u0_sml.jpg)
R5F21238DFP#U0
Manufacturer Part Number
R5F21238DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Specifications of R5F21238DFP#U0
Core Size
16/32-Bit
Program Memory Size
64KB (64K x 8)
Peripherals
POR, Voltage Detect, WDT
Core Processor
R8C
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Number Of I /o
41
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
I2C/UART
Total Internal Ram Size
3KB
# I/os (max)
41
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (6Mb)
R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Table 7.14
X: 0 or 1
NOTE:
Table 7.15
X: 0 or 1
NOTE:
Table 7.16
X: 0 or 1
NOTES:
Table 7.17
X: 0 or 1
NOTE:
Register
Register
Register
Register
Setting
Setting
Setting
Setting
1. Pulled up by setting the PU02 bit in the PUR0 register to 1.
1. Pulled up by setting the PU02 bit in the PUR0 register to 1.
1. Pulled up by setting the PU03 bit in the PUR0 register to 1.
2. N-channel open drain output by setting the NCH bit in the U0C0 register to 1.
1. Pulled up by setting the PU03 bit in the PUR0 register to 1.
value
value
value
value
Bit
Bit
Bit
Bit
PD1_5
PD1_2
PD1_3
PD1_4
PD1
PD1
PD1
PD1
Port P1_2/KI2/AN10
Port P1_3/KI3/AN11
Port P1_4/TXD0
Port P1_5/RXD0/(TRAIO)/(INT1)
0
1
0
0
0
X
0
1
0
0
0
1
0
0
0
1
X
TIOSEL
KI2EN
KI3EN
KIEN
KIEN
Page 59 of 501
SMD2
0
X
X
0
X
X
X
0
1
1
1
X
X
X
X
X
X
1
1
TRAIOC
0
0
0
1
1
1
TOPCR
X
1
X
X
1
X
X
X
X
X
0
CH2
CH2
U0MR
SMD1
X
X
X
X
X
X
1
1
0
0
0
0
0
1
TMOD2
X
X
X
X
0
0
CH1
CH1
X
X
X
X
X
X
SMD0
1
1
Other than 001b
Other than 001b
Other than 001b
Other than 001b
Other than 001b
ADCON0
ADCON0
0
0
1
0
1
0
TRAMR
TMOD1
X
X
X
X
0
0
Input port
Output port
TXD0 output
CH0
CH0
X
X
X
X
X
X
0
1
TMOD0
X
X
X
X
1
1
(1)
ADGSEL0
ADGSEL0
(2)
X
X
X
1
X
X
X
1
INT1EN
INTEN
X
X
X
X
X
1
Input port
Output port
KI2 input
A/D converter input (AN10)
Input port
Output port
KI3 input
A/D converter input (AN11)
Input port
Output port
RXD0 input
TRAIO input
TRAIO/INT1 input
TRAIO pulse output
Function
(1)
(1)
7. Programmable I/O Ports
(1)
Function
Function
Function
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