R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 447

• Manufacturer Part Number: R5F21238DFP#U0
• Description: IC R8C/23 MCU FLASH 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/23r

Specifications of R5F21238DFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Peripherals: POR, Voltage Detect, WDT
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: I2C/UART
• Total Internal Ram Size: 3KB
• # I/os (max): 41
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 20.5
Flash Memory Control Register 0
b7 b6 b5 b4
NOTES:
1.
2.
3.
4.
5.
6.
0 0
When setting this bit to 1, set to 1 immediately after setting it first to 0. Do not generate an interrupt betw een setting
the bit to 0 and setting it to 1. Enter read array mode and set this bit to 0.
Set this bit to 1 immediately after setting this bit first to 0 w hile the FMR01 bit is set to 1.
Do not generate an interrupt betw een setting the bit to 0 and setting it to 1.
Set this bit by a program transferred to the RAM.
This bit is set to 0 by executing the clear status command.
This bit is enabled w hen the FMR01 bit is set to 1 (CPU rew rite mode enabled). When the FMR01 bit is set to 0 and
w riting 1 to the FMSTP bit, the FMSTP bit is set to 1. The flash memory does not enter low -pow er consumption stat
When setting the FMR01 bit to 0 (CPU rew rite mode disabled), the FMR02 bit is set to 0 (disables rew rite).
b3 b2 b1 b0
FMR0 Register
Bit Symbol
(b5-b4)
Symbol
FMR00
FMR02
FMSTP
FMR06
FMR07
FMR01
FMR0
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RY/BY
CPU rew rite mode select bit
Block 0, 1, 2, 3 rew rite enable
bit
Flash memory stop bit
Reserved bit
Program status flag
Erase status flag
(2,6)
____
status flag
Address
Bit Name
01B7h
(4)
(4)
(3,5)
(1)
0 : Busy (During w riting or erasing)
1 : Ready
0 : CPU rew rite mode disabled
1 : CPU rew rite mode enabled
0 : Disables rew rite
1 : Enables rew rite
0 : Enables flash memory operation
1 : Stops flash memory
Set to 0
0 : Completed successfully
1 : Terminated by error
0 : Completed successfully
1 : Terminated by error
(Enters low -pow er consumption state
and flash memory is reset)
After Reset
00000001b
Function
20. Flash Memory
RW
RW
RW
RW
RW
RO
RO
RO