R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 196

IC R8C/23 MCU FLASH 48-LQFP

R5F21238DFP#U0

Manufacturer Part Number
R5F21238DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Datasheets

Specifications of R5F21238DFP#U0

Core Size
16/32-Bit
Program Memory Size
64KB (64K x 8)
Peripherals
POR, Voltage Detect, WDT
Core Processor
R8C
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Number Of I /o
41
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
I2C/UART
Total Internal Ram Size
3KB
# I/os (max)
41
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 14.28
14.3.1
Table 14.21
i = 0 or 1
NOTE:
f1, f2, f4, f8, f32
fOCO40M
External Signal Input
to TRDCLK Pin
1. The count source fOCO40M can be used with VCC = 3.0 to 5.5 V.
Count Source
TRDCLK/
TRDIOA0
The count source selection can be used in all modes. However, in PWM3 mode, the external clock cannot be
selected.
Set the pulse width of the external clock which inputs to the TRDCLK pin to 3 cycles or above of the operation
clock of Timer RD (refer to Table 14.11 Timer RD Operation Clocks).
When selecting fOCO40M for the count source, set the FRA00 bit in the FRA0 register to 1 (high-speed on-
chip oscillator on) before setting the TCK2 to TCK0 bits in the TRDCRi register (i = 0 or 1) to 110b
(fOCO40M).
fOCO40M
Count Source
(1)
f32
f1
f2
f4
f8
Count Source Selection
Block Diagram of Count Source
i = 0 or 1
TCK2 to TCK0, CKEG1 to CKEG0: Bits in TRDCRi register
STCLK: Bit in TRDFCR register
STCLK = 1
STCLK = 0
Page 174 of 501
The count source is selected by bits TCK2 to TCK0 in the TRDCRi register.
The FRA00 bit in the FRA0 register is set to 1 (high-speed on-chip oscillator
frequency).
Bits TCK2 to TCK0 in the TRDCRi register is set to 110b (fOCO40M).
The STCLK bit in the TRDFCR register is set to 1 (external clock input enabled).
The TCK2 to TCK0 bits in the TRDCRi register are set to 101b
(count source: external clock).
The valid edge selected by the CKEG1 to CKEG0 bits in the TRDCRi register.
The PD2_0 bit in the PD2 register is set to 0 (input mode).
CKEG1 to CKEG0
Valid edge
selected
= 011b
= 010b
= 100b
= 110b
= 001b
TCK2 to TCK0
TRDIOA0 I/O or programmable I/O port
= 000b
= 101b
Selection
Count source
TRDi register
14. Timers

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