R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 424

• Manufacturer Part Number: R5F21238DFP#U0
• Description: IC R8C/23 MCU FLASH 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/23r

Specifications of R5F21238DFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Peripherals: POR, Voltage Detect, WDT
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: I2C/UART
• Total Internal Ram Size: 3KB
• # I/os (max): 41
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 19.3
A/D Control Register 1
A/D Control Register 2
A/D Register
(b15)
b7 b6 b5 b4
NOTES:
b7 b6 b5 b4
NOTE:
b7
0 0
1.
2.
3. When the VCUT bit is set to 1 (connected) from 0 (not connected), w ait for 1 µs or more before starting A/D
1.
If the ADCON1 register is rew ritten during A/D conversion, the conversion result is indeterminate.
Set the BITS bit to 0 (8-bit mode) in repeat mode.
conversion.
If the ADCON2 register is rew ritten during A/D conversion, the conversion result is indeterminate.
b3 b2
b3 b2 b1
0
0 0
0 0
Registers ADCON1, ADCON2, and AD
b1 b0
(b8)
b0
b0
0
b7
When BITS bit in ADCON1 register is set to 1
(10-bit mode)
8 low -order bits in A/D conversion result
2 high-order bits in A/D conversion result
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Bit Symbol
Bit Symbol
ADCON1
ADCON2
(b2-b0)
(b7-b6)
(b3-b1)
(b7-b4)
Symbol
Symbol
(1)
(1)
CKS1
VCUT
Page 402 of 501
BITS
SMP
—
—
—
—
Reserved bit
8/10-bit mode select bit
Frequency select bit 1
Vref connect bit
Reserved Bit
A/D conversion method select bit
Reserved bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
b0
Address
Bit Name
00D7h
Address
Bit Name
00D4h
(3)
Symbol
(2)
AD
Set to 0
0 : 8-bit mode
1 : 10-bit mode
Refer to a description of the CKS0 bit in the
ADCON0 register function
0 : Vref not connected
1 : Vref connected
Set to 0
Function
When BITS bit in ADCON1 register is set to 0
(8-bit mode)
A/D conversion result
When read, its content is indeterminate
0 : Without sample and hold
1 : With sample and hold
Set to 0
00C1h-00C0h
Address
After Reset
Function
00h
After Reset
Function
00h
Indeterminate
After Reset
19. A/D Converter
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
—
RO
RO
—