R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 453

IC R8C/23 MCU FLASH 48-LQFP

R5F21238DFP#U0

Manufacturer Part Number
R5F21238DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Datasheets

Specifications of R5F21238DFP#U0

Core Size
16/32-Bit
Program Memory Size
64KB (64K x 8)
Peripherals
POR, Voltage Detect, WDT
Core Processor
R8C
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Number Of I /o
41
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
I2C/UART
Total Internal Ram Size
3KB
# I/os (max)
41
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
20.4.3
Table 20.4
Read Array
Read Status Register
Clear Status Register
Program
Block Erase
20.4.3.1
20.4.3.2
20.4.3.3
SRD: Status register
WA: Write address (Ensure the address specified in the first bus cycle is the same address as the write
WD: Write data (8 bits)
BA: Given block address
×:
Software commands are described below. Read or write commands and data from or to in 8-bit units.
The read array command reads the flash memory.
The MCU enters read array mode by writing FFh in the first bus cycle. If entering the read address after the
following bus cycles, the content of the specified address can be read in 8-bit units.
Since the MCU remains in read array mode until another command is written, the contents of multiple
addresses can be read continuously.
In addition, the MCU enters read array mode after a reset.
The read status register command reads the status register.
If writing 70h in the first bus cycle, the status register can be read in the second bus cycle. (Refer to 20.4.4
Status Registers) When reading the status register, specify an address in the user ROM area.
Do not execute this command in EW1 mode.
The MCU remains in read status register mode until the next read array command is written.
The clear status register command sets the status register to 0.
If writing 50h in the first bus cycle, the FMR06 to FMR07 bits in the FMR0 register and SR4 to SR5 in the
status register will be set to 0.
Command
address specified in the second bus cycle.)
Any specified address in the user ROM area
Software Commands
Read Array Command
Read Status Register Command
Clear Status Register Command
Software Commands
data (D7 to D0)
Page 431 of 501
Mode
Write
Write
Write
Write
Write
First Bus Cycle
Address
WA
×
×
×
×
(D7 to D0)
Data
FFh
70h
50h
40h
20h
Mode
Read
Write
Write
Second Bus Cycle
Address
WA
BA
×
20. Flash Memory
(
D7 to D0)
Data
SRD
D0h
WD

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