R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 529

IC R8C/23 MCU FLASH 48-LQFP

R5F21238DFP#U0

Manufacturer Part Number
R5F21238DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Datasheets

Specifications of R5F21238DFP#U0

Core Size
16/32-Bit
Program Memory Size
64KB (64K x 8)
Peripherals
POR, Voltage Detect, WDT
Core Processor
R8C
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Number Of I /o
41
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
I2C/UART
Total Internal Ram Size
3KB
# I/os (max)
41
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Rev.
0.20
REVISION HISTORY
Jun 28, 2006
Date
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14.3.4 Pulse Output Forced Cutoff, on the 13th line;
On the 15th line;
On the 2nd line from the bottom;
14.3.5 Input Capture Function, on the 5th line;
Figure 14.34 Block Diagram of Input Capture Function;
Table 14.23 Input Capture Function Specifications revised.
Figure 14.35 Registers TRDSTR and TRDMR in Input Capture Function;
Figure 14.36 TRDPMR Register in Input Capture Function revised.
Figure 14.37 TRDFCR Register in Input Capture Function revised.
Figure 14.39 Registers TRDCR0 to TRDCR1 in Input Capture Function
revised.
Figure 14.40 Registers TRDIORA0 to TRDIORA1 in Input Capture
Function revised.
Figure 14.41 Registers TRDIORC0 to TRDIORC1 in Input Capture
Function revised.
Figure 14.42 Registers TRDSR0 to TRDSR1 in Input Capture Function
revised.
Table 14.25 Output Compare Function Specifications, on the 5 to 6th
lines from the bottom;
Figure 14.49 Registers TRDSTR and TRDMR in Output Compare
Function revised.
Figure 14.50 TRDPMR Register in Output Compare Function revised.
Figure 14.51 TRDFCR Register in Output Compare Function revised.
Figure 14.52 Registers TRDOER1 to TRDOER2 in Output Compare
Function;
Figure 14.54 Registers TRDCR0 to TRDCR1 in Output Compare
Function revised.
Figure 14.55 Registers TRDIORA0 to TRDIORA1 in Output Compare
Function revised.
Figure 14.56 Registers TRDIORC0 to TRDIORC1 in Output Compare
Function revised.
Figure 14.57 Registers TRDSR0 to TRDSR1 in Output Compare
Function revised.
Figure 14.65 TRDSTR Register in PWM Mode revised
R8C/22 Group, R8C/23 Group Hardware Manual
“P2D” → “PD2” corrected.
“P4_5 bit in the P4D register” → “PD4_5 bit in the PD4 register”
corrected.
“According to ~ of interrupts” added.
“The TRDGRA0 register ~ trigger input.” added.
NOTES revised.
The TRDSTR register revised.
“TRCIOAi” → “TRDIOAi” and “TRCIOBi” → “TRDIOBi” corrected.
NOTE in the TRDOER2 register added.
C - 6
Description
Summary

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