R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 134
![IC R8C/23 MCU FLASH 48-LQFP](/photos/12/38/123822/r5f21238dfp_u0_sml.jpg)
R5F21238DFP#U0
Manufacturer Part Number
R5F21238DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Specifications of R5F21238DFP#U0
Core Size
16/32-Bit
Program Memory Size
64KB (64K x 8)
Peripherals
POR, Voltage Detect, WDT
Core Processor
R8C
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Number Of I /o
41
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
I2C/UART
Total Internal Ram Size
3KB
# I/os (max)
41
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (6Mb)
R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 12.14
Figure 12.15
12.2.2
INTi input
Sampling
timing
IR bit in
INTiIC register
The INTi input contains a digital filter. The sampling clock is selected by the INTiF1 to INTiF0 bits in the
INTF register. The IR bit in the INTiIC register is set to 1 (interrupt requested) when the INTi level is sampled
for every sampling clock and the sampled input level matches three times.
Figure 12.14 shows the Configuration of INTi Input Filter. Figure 12.15 shows Operating Example of INTi
Input Filter.
INTi Input Filter (i = 0 to 3)
Port direction
NOTE:
i = 0 to 3
Configuration of INTi Input Filter
Operating Example of INTi Input Filter
register
1. This is an operation example when the INTiF1 to INTiF0 bits in the
INTi
INTiF register is set to 01b, 10b, or 11b (passing digital filter).
(1)
i = 0 to 3
INTiF0, INTiF1: Bits in INTF register
INTiEN, INTiPL: Bits in INTEN register
NOTE:
f32
f1
f8
Page 112 of 501
1. INT0: Port P4_5 direction register
INTiF1 to INTiF0
INT1: Port P1_5 direction register when using P1_5 pin
INT2: Port P6_6 direction register
INT3: Port P6_7 direction register
= 01b
= 10b
= 11b
P1_7 direction register when using P1_7 pin
Sampling clock
matches 3x)
Digital filter
(input level
Other than
INTiF1 to INTiF0
= 00b
INTiEN
=00b
Both Edges
Detection
Set to 0 in program
Circuit
INTiPL = 0
INTiPL = 1
INTi interrupt
12. Interrupts
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