R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 533

• Manufacturer Part Number: R5F21238DFP#U0
• Description: IC R8C/23 MCU FLASH 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/23r

Specifications of R5F21238DFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Peripherals: POR, Voltage Detect, WDT
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: I2C/UART
• Total Internal Ram Size: 3KB
• # I/os (max): 41
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Rev.
0.20
REVISION HISTORY
Jun 28, 2006 352 to 385 17. Hardware LIN;
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Figure 17.2 LINCR Register revised.
Figure 17.3 LINST Register revised.
Figure 17.4 Typical Operation when Sending a Header Field;
Figure 17.5 Example of Header Field Transmission Flowchart (1) revised.
Figure 17.6 Example of Header Field Transmission Flowchart (2) revised.
Figure 17.7 Typical Operation when Receiving a Header Field;
Figure 17.8 Example of Header Field Reception Flowchart (1) revised.
Figure 17.9 Example of Header Field Reception Flowchart (2) revised.
Figure 17.10 Example of Header Field Reception Flowchart (3) revised.
Figure 17.11 Typical Operation when a Bus Collision is Detected;
17.5 Interrupt Requests, on the 2nd line;
Figure 18.9 C0SSTR Register, Setting values;
Figure 18.16 Transition between Operational Modes revised.
18.5.3 CAN Sleep Mode, on the 1st line;
Table 18.2 Examples of Baud Rate revised.
18.14 Notes on CAN Module;
Table 18.5 Recommended Pin Connections (In Case of PCA82C250: Philips
Product) and Table 18.6 Recommended Pin Connections (In Case of
PCA82C252: Philips Product);
Table 19.1 Performance of A/D converter revised.
Figure 19.1 Block Diagram of A/D Converter;
Table 19.2 One-Shot Mode Specifications, Input pin;
19.3 Sample and Hold, on the 2nd and 5th lines;
19.4 A/D Conversion Cycles added.
19.5 Internal Equivalent Circuit of Analog Input added.
19.6 Output Impedance of Sensor Under A/D Conversion added.
R8C/22 Group, R8C/23 Group Hardware Manual
“Sync” → “Synch” revised.
“RAIC” → “TRAIC” corrected.
“RAIC” → “TRAIC” corrected.
“RAIC” → “TRAIC” corrected.
“Synch Break generation competed” added.
“1: Reception slot, The message is read” → “1: Reception slot, The
message is not read” corrected.
“and the Reset bit is set to 0” deleted.
“18.14 Precautions on CAN Module” → “18.14 Notes on CAN Module”
revised.
NOTES; “Ta” → “Topr” revised.
“ADGSEL” → “ADGSEL0” corrected.
“AN8” → “AN0” corrected.
“to 28 φ AD cycles ~ 10-bit resolution.” deleted.
“When performing ~ the microcomputer.” deleted.
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Description
Summary