R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 492

• Manufacturer Part Number: R5F21238DFP#U0
• Description: IC R8C/23 MCU FLASH 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/23r

Specifications of R5F21238DFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Peripherals: POR, Voltage Detect, WDT
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: I2C/UART
• Total Internal Ram Size: 3KB
• # I/os (max): 41
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
22.2.5
Sample programs 1 to 3 are preventing the I flag from being set to 1 (interrupt enables) before changing the
interrupt control register for reasons of the internal bus or the instruction queue buffer.
Example 1: Use NOP instructions to prevent I flag being set to 1 before interrupt control register is
Example 2: Use dummy read to have FSET instruction wait
Example 3: Use POPC instruction to change I flag
(a) Each interrupt control register can only be changed while interrupt requests corresponding to that
(b) When changing any interrupt control register after disabling interrupts, be careful with the instructions
(c) When disabling interrupts using the I flag, set the I flag according to the following sample programs.
INT_SWITCH1:
INT_SWITCH2:
INT_SWITCH3:
Changing Interrupt Control Register Contents
FCLR
AND.B
MOV.W
FSET
PUSHC
FCLR
AND.B
POPC
FCLR
AND.B
NOP
NOP
FSET
register are not generated. If interrupt requests may be generated, disable the interrupts before changing
the interrupt control register.
to be used.
When changing any bit other than IR bit
If an interrupt request corresponding to that register is generated while executing the instruction, the IR
bit may not be set to 1 (interrupt requested), and the interrupt request may be ignored. If this causes a
problem, use the following instructions to change the register.
Instructions to use: AND, OR, BCLR, BSET
When changing IR bit
If the IR bit is set to 0 (interrupt not requested), it may not be set to 0 depending on the instruction to be
used. Therefore, use the MOV instruction to set the IR bit to 0.
Refer to (b) for the change of interrupt control registers in the sample programs.
changed
I
I
I
I
I
FLG
#00H,0056H
#00H,0056H
MEM,R0
FLG
#00H,0056H
Page 470 of 501
; Disable interrupts
; Set TRAIC register to 00h
;
; Enable interrupts
; Disable interrupts
; Set TRAIC register to 00h
; Dummy read
; Enable interrupts
; Disable interrupts
; Set TRAIC register to 00h
; Enable interrupts
22. Usage Notes