R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 444

• Manufacturer Part Number: R5F21238DFP#U0
• Description: IC R8C/23 MCU FLASH 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/23r

Specifications of R5F21238DFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Peripherals: POR, Voltage Detect, WDT
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: I2C/UART
• Total Internal Ram Size: 3KB
• # I/os (max): 41
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
20.4.1
20.4.2
The MCU enters CPU rewrite mode and software commands can be acknowledged by setting the FMR01 bit in
the FMR0 register to 1 (CPU rewrite mode enabled). In this case, since the FMR11 bit in the FMR1 register is
set to 0, EW0 mode is selected.
Use software commands to control a program and erase operations. The FMR0 register or the status register can
determine status when program and erase operation complete.
When entering an erase-suspend, set the FMR40 bit to 1 (enables suspend) and the FMR41 bit to 1 (requests
erase-suspend). Wait for td(SR-SUS) and ensure that the FMR46 bit is set to 1 (enables reading) before
accessing the user ROM area. The auto-erase operation restarts by setting the FMR41 bit to 0 (erase restarts).
When entering a program-suspend during the auto-program, set the FMR40 bit to 1 (enables suspend) and the
FMR42 bit to 1 (requests program-suspend). Wait for td(SR-SUS) and ensure that the FMR46 bit is set to 1
(enables reading) before accessing the user ROM area. The auto-program operation restarts by setting the
FMR42 bit to 0 (program restarts).
The MCU enters EW1 mode by setting the FMR11 bit to 1 (EW1 mode) after setting the FMR01 bit to 1 (CPU
rewrite mode enabled).
The FMR0 register can determine status when program and erase operation complete. Do not execute
commands of the read status register in EW1 mode.
To enable the erase-suspend function during the auto-erase, execute the block erase command after setting the
FMR40 bit to 1 (enables suspend). The interrupt to enter an erase-suspend should be in interrupt enabled status.
After passing td(SR-SUS) since the block erase command is executed, an interrupt request is acknowledged.
When an interrupt request is generated, the FMR41 bit is automatically set to 1 (requests erase-suspend) and the
auto-erase operation is halted. If the auto-erase operation does not complete (FMR00 bit is 0) when the interrupt
process completes, the auto-erase operation restarts by setting the FMR41 bit to 0 (erase restarts)
To enable the program-suspend function during the auto-program, execute the program command after setting
the FMR40 bit to 1 (enables suspend). The interrupt to enter a program-suspend should be in interrupt enabled
status. After waiting for td(SR-SUS) since the program command is executed, an interrupt request is
acknowledged.
When an interrupt request is generated, the FMR42 bit is automatically set to 1 (requests program-suspend) and
the auto-program operation suspends. When the auto-program operation does not complete (FMR00 bit is 0)
after the interrupt process completes, the auto-program operation restarts by setting the FMR42 bit to 0
(program restarts).
EW0 Mode
EW1 Mode
Page 422 of 501
20. Flash Memory