R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 377

• Manufacturer Part Number: R5F21238DFP#U0
• Description: IC R8C/23 MCU FLASH 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/23r

Specifications of R5F21238DFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Peripherals: POR, Voltage Detect, WDT
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: I2C/UART
• Total Internal Ram Size: 3KB
• # I/os (max): 41
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
17. Hardware LIN
The hardware LIN performs LIN communication in cooperation with timer RA and UART0.
17.1
Figure 17.1
RXD0 pin
TXD0 pin
The hardware LIN has the following features.
Figure 17.1 shows a Block Diagram of Hardware LIN.
[Master mode]
[Slave mode]
•
•
•
•
•
•
Generates Synch Break
Detects bus collision
Detects Synch Break
Measures Synch Field
Controls Synch Break and Synch Field signal inputs to UART0
Detects bus collision
NOTE:
Features
1. The WakeUp function is detected by INT1.
[Legend]
LINE, MST, SBE, LSTART, BCIE, SBIE, SFIE: LINCR register bits
TIOSEL: TRAIOC register bit
TE: U0C1 register bit
Hardware LIN
LSTART bit
Block Diagram of Hardware LIN
LINE bit
SBE bit
Page 355 of 501
RXD0 input
control
circuit
Synch Field
control
circuit
TIOSEL = 0
TIOSEL = 1
Bus collision
detection
circuit
MST bit
and SFIE bits
BCIE, SBIE,
RXD data
Interrupt
control
circuit
Timer RA output pulse
UART0 transfer clock
UART0 TXD data
UART0 TE bit
underflow signal
Timer RA
Timer RA
UART0
17. Hardware LIN
Timer RA
interrupt