R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 540

• Manufacturer Part Number: R5F21238DFP#U0
• Description: IC R8C/23 MCU FLASH 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/23r

Specifications of R5F21238DFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Peripherals: POR, Voltage Detect, WDT
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: I2C/UART
• Total Internal Ram Size: 3KB
• # I/os (max): 41
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Rev.
1.00
REVISION HISTORY
Oct 27, 2006
Date
Page
163
164
165
171
179
193
196
197
206
209
212
213
Figure 14.26 Registers TRBIOC and TRBMR in Programmable Wait One-Shot
Generation Mode → Figure 14.23 TRBIOC Register in Programmable Wait One-
Shot Generation Mode replaced.
TOPL bit and NOTE revised.
Timer RB Mode Register deleted.
Figure 14.27 Operation Example of Programmable Wait One-Shot Generation
Mode → Figure 14.24 Operation Example of Programmable Wait One-Shot
Generation Mode replaced.
Figure 14.24 revised.
14.2.5 Notes on Timer RB revised.
Table 14.21 Count Source Selection;
Figure 14.35 Registers TRDSTR and TRDMR in Input Capture Function →
FIgure 14.32 Registers TRDSTR and TRDMR in Input Capture Function
replaced.
Timer RD Start Register
revised.
“TRD1 count start bit” → “TRD1 count start flag” revised.
Figure 14.49 Registers TRDSTR and TRDMR in Output Compare Function →
Figure 14.46 Registers TRDSTR and TRDMR in Output Compare Function
replaced.
Timer RD Start Register
revised.
Figure 14.52 Registers TRDOER1 to TRDOER2 in Output Compare Function →
Figure 14.49 Registers TRDOER1 to TRDOER2 in Output Compare Function
replaced.
Figure 14.50 TRDOCR Register in Output Compare Function → Figure 14.50
TRDOCR Register in Output Compare Function replaced.
NOTE2 added.
On the first line; “Figure 14.63 ~” → “Figure 14.60 lists ~” corrected.
Figure 14.65 TRDSTR Register in PWM Mode → Figure 14.62 TRDSTR
Register in PWM Mode replaced.
corrected.
Figure 14.68 Registers TRDOER1 to TRDOER2 in PWM Mode → Figure 14.65
Registers TRDOER1 to TRDOER2 in PWM Mode replaced.
Figure 14.69 Registers TRDOCR and TRDCR0 to TRDCR1 in PWM Mode →
Figure 14.66 Registers TRDOCR and TRDCR0 to TRDCR1 in PWM Mode
replaced.
NOTE1 added.
“TRD1 count start bit
Timer RD Output Master Enable Register 1 revised.
Timer RD Star Register
“TRD1 count start bit
Timer RD Output Control Register
R8C/22 Group, R8C/23 Group Hardware Manual
C - 17
(5)
(5)
” → “TRD1 count start flag
” → “TRD1 count start flag
(1)
(1)
(1)
; “TRD0 count start bit
; “TRD0 count start bit
; “TRD0 count start bit” → “TRD0 count start flag”
Description
Summary
(1)
; NOTE2 added.
(4)
(4)
” → “TRD0 count start flag(4)”
(5)
” → “TRD0 count start flag
(5)
” revised.
” corrected.
(4)
”