R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 322

• Manufacturer Part Number: R5F21238DFP#U0
• Description: IC R8C/23 MCU FLASH 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/23r

Specifications of R5F21238DFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Peripherals: POR, Voltage Detect, WDT
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: I2C/UART
• Total Internal Ram Size: 3KB
• # I/os (max): 41
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 16.7
SS Mode Register 2
b7 b6 b5 b4
NOTES:
1.
2.
3.
4.
5.
Refer to 16.2.2.1 Association betw een Data I/O Pins and SS Shift Register for the combination of the data I/O
pin.
The SCS
set to 0 (clock synchronous communication mode).
This bit functions as the SCS
The BIDE bit is disabled w hen the SSUMS bit is set to 0 (clock synchronous communication mode).
The SSI pin and SSO pin corresponding port direction bits are set to 0 (input mode) w hen the SOOS bit is set to 0
(CMOS output).
b3
______
b2 b1
SSMR2 Register
pin functions as a port, regardless of the contents of the CSS0 and CSS1 bits w hen the SSUMS bit is
b0
Bit Symbol
SSUMS
SCKOS
Symbol
SSMR2
SOOS
CSOS
SCKS
CSS0
CSS1
Page 300 of 501
BIDE
_____
Clock synchronous serial I/O w ith
chip select mode select bit
_____
SCS
SSO pin open drain output select
bit
SSCK pin open drain output
select bit
_____
SCS
SSCK pin select bit
Bidirectional mode enable bit
input pin before starting transfer.
(1)
pin open drain output select 0 : CMOS output
pin select bit
Address
Bit Name
00BDh
(2)
(1)
(1,4)
b5 b4
0 0 : Functions as port
0 : Clock synchronous communication mode
1 : Four-w ire bus communication mode
1 : N-channel open drain output
0 : CMOS output
1 : N-channel open drain output
0 : CMOS output
1 : N-channel open drain output
0 1 : Function as SCS
1 0 : Function as SCS
1 1 : Functions as SCS
0 : Functions as port
1 : Functions as serial clock pin
0 : Standard mode (communicates using 2
1 : Bidirectional mode (communicates using
pins of data input and data output)
1 pin of data input and data output)
16. Clock Synchronous Serial Interface
(5)
After Reset
_____
_____
_____
Function
00h
input pin
output pin
output pin
(3)
(3)
RW
RW
RW
RW
RW
RW
RW
RW
RW