R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 543

• Manufacturer Part Number: R5F21238DFP#U0
• Description: IC R8C/23 MCU FLASH 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/23r

Specifications of R5F21238DFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Peripherals: POR, Voltage Detect, WDT
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: I2C/UART
• Total Internal Ram Size: 3KB
• # I/os (max): 41
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Rev.
1.00
REVISION HISTORY
Oct 27, 2006
Date
Page
415
417
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420
428
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435
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456
Figure 20.2 Flash Memory Block Diagram for R8C/23 Group revised.
Figure 20.4 OFS Register;
enabled after reset)” corrected.
Table 20.3 Differences between EW0 Mode and EW1 Mode;
20.4.2.3 FMR02 Bit;
not ~” corrected.
20.4.3.1 Read Array Command, on the bottom line;
20.4.3.2 Read Status Register Command, on the bottom line;
command is written.” added.
Figure 20.13 Program Command (When Suspend Function Enabled) revised.
NOTE3 added.
Figure 20.15 Block Erase Command (When Erase-Suspend Function Enabled)
revised.
NOTE3 added.
Figure 20.16 Full Status Check and Handling Procedure for Individual Errors;
Table 20.8 Pin Functions (Flash Memory Standard Serial I/O Mode 3);
20.7.1.7 Reset Flash Memory deleted.
20.7.1.8 Entering Stop Mode or Wait Mode → 20.7.1.7 Entering Stop Mode or
Wait Mode corrected.
Table 21.1 Absolute Maximum Ratings; Power dissipation revised.
Table 21.2 Recommended Operating Conditions; System clock revised.
Table 21.8 Voltage Monitor 1 Reset Circuit Electrical Characteristics → Table
21.8 Power-on Reset Circuit, Voltage Monitor 1 Reset Circuit Electrical
Characteristics
Table 21.8 revised.
NOTE3 added.
Table 21.9 Power-on Reset Circuit Electrical Characteristics deleted.
Figure 21.3 Power-on Reset Circuit Electrical Characteristics revised.
Table 21.10 High-Speed On-Chip Oscillator Circuit Electrical Characteristics →
Table 21.9 High-Speed On-Chip Oscillator Circuit Electrical Characteristics
revised.
Table 21.15 Electrical Characteristics (1) [VCC = 5 V] → Table 21.14 Electrical
Characteristics (1) [VCC = 5 V] revised.
NOTE2; “LVD0ON” → “LVD1ON” and
“(voltage monitor 0 reset enabled after reset)” → “voltage monitor 0 reset
Modes After Read Status Register added.
“The block 1 and block 0 do not ~” → “The block0 block1 block2, and block3 do
“In addition, the MCU enters read array mode after a reset.” added.
“The MCU remains in read status register mode until the next read array
“FMR07 = 0?” → “FMR07 = 1?” and
“FMR06 = 0?” → “FMR06 = 1?” corrected.
P4_2/VREF deleted.
P4_3 or P4_5 → P4_2 to P4_5 corrected.
RAM Hold Voltage, Min.; “1.8” → “2.0” corrected.
R8C/22 Group, R8C/23 Group Hardware Manual
(1)
C - 20
replaced.
Description
Summary