R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 214

• Manufacturer Part Number: R5F21238DFP#U0
• Description: IC R8C/23 MCU FLASH 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/23r

Specifications of R5F21238DFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Peripherals: POR, Voltage Detect, WDT
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: I2C/UART
• Total Internal Ram Size: 3KB
• # I/os (max): 41
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 14.45
The above applies to the following conditions:
The CCLR2 to CCLR0 bits in the TRDCRi register are set to 001b. (Set the TRDi register to 0000h by the TRDGRAi register input capture.)
The TCK2 to TCK0 bits in the TRDCRi register are set to 101b (TRDCLK input for the count source).
The CKEG1 to CKEG0 bits in the TRDCRi register are set to 01b (count at the falling edge for the count source).
The IOA2 to IOA0 bits in the TRDIORAi register are set to 101b (input capture at the falling edge of the TRDIOAi input).
The BFCi bit in the TRDMR register is set to 1. (The TRDGRCi register is used as the buffer register of the TRDGRAi register.)
i = 0 or 1
TRDGRCi register
TRDGRAi register
TRDSTR register
TRDSRi register
TRDSRi register
TSTARTi bit in
TRDIOAi input
TRDCLK input
IMFA bit in
OVF bit in
count source
in TRDi register
Count value
FFFFh
Operating Example of Input Capture Function
0009h
0006h
0000h
1
0
1
0
1
0
Page 192 of 501
65536
Set to 0 by a program
Transfer
0006h
Transfer
0009h
0006h
14. Timers