R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 380

• Manufacturer Part Number: R5F21238DFP#U0
• Description: IC R8C/23 MCU FLASH 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/23r

Specifications of R5F21238DFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Peripherals: POR, Voltage Detect, WDT
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: I2C/UART
• Total Internal Ram Size: 3KB
• # I/os (max): 41
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 17.3
LIN Status Register
b7 b6 b5 b4 b3 b2 b1 b0
LINST Register
Bit Symbol
(b7-b6)
Symbol
SFDCT
SBDCT
BCDCT
B0CLR
B1CLR
B2CLR
LINST
Page 358 of 501
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Synch Field measurement-
completed flag
Synch Break detection flag
Bus collision detection flag
SFDCT flag clear bit
SBDCT flag clear bit
BCDCT flag clear bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Address
Bit Name
0107h
1 show s Synch Field measurement completed.
1 show s Synch Break detected or Synch
Break generation completed
1 show s Bus collision detected
When this bit is set to 1, SFDCT bit is set to 0.
When read, its content is 0.
When this bit is set to 1, SBDCT bit is set to 0.
When read, its content is 0.
When this bit is set to 1, BCDCT bit is set to0.
When read, its content is 0.
After Reset
Function
00h
17. Hardware LIN
WO
WO
WO
RW
RO
RO
RO
—