R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 525
![IC R8C/23 MCU FLASH 48-LQFP](/photos/12/38/123822/r5f21238dfp_u0_sml.jpg)
R5F21238DFP#U0
Manufacturer Part Number
R5F21238DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Specifications of R5F21238DFP#U0
Core Size
16/32-Bit
Program Memory Size
64KB (64K x 8)
Peripherals
POR, Voltage Detect, WDT
Core Processor
R8C
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Number Of I /o
41
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
I2C/UART
Total Internal Ram Size
3KB
# I/os (max)
41
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 525 of 551
- Download datasheet (6Mb)
Rev.
0.20
REVISION HISTORY
Jun 28, 2006
Date
35 to 68 “6. Programmable I/O Ports” → “6. Voltage Detection Circuit” and
Page
12
13
14
15
30
31
32
33
34
38
39
2.8.7 Interrupt Enable Flag (I)
2.8.8 Stack Pointer Select Flag (U)
2.8.10 Reserved Bit
Figure 3.1 Memory Map of R8C/22 Group;
Figure 3.2 Memory Map of R8C/23 Group;
Table 4.1 SFR Information (1);
Figure 5.4 OFS Register, Function of the LVD1ON bit;
5.1.1 When Power Supply is Stable (2) revised.
5.1.2 Power On (4) revised.
Figure 5.5 Example of Hardware Reset Circuit and Operation and Figure
5.6 Example of Hardware Reset Circuit (Usage Example of External
Supply Voltage Detection Circuit) and Operation revised.
5.2 Power-On Reset Function, on the 2nd line;
5.3 Voltage Monitor 1 Reset(1); on the 8th line;
“7. Voltage Detection Circuit” → “7. Programmable I/O Ports” revised.
Figure 6.4 Registers VCA1 and VCA2;
Figure 6.5 VW1C Register revised.
Figure 5.7 Example of Power-On Reset Circuit and Operation revised.
R8C/22 Group, R8C/23 Group Hardware Manual
“2.8.7 Interrupt Enable Flag (I Flag)” → “2.8.7 Interrupt Enable Flag (I)”
revised.
“2.8.8 Stack Pointer Select Flag (U Flag)” → “2.8.8 Stack Pointer
Select Flag (U)” revised.
“2.8.10 Reserved Area” → “2.8.10 Reserved Bit” revised.
“Internal ROM” → “Internal ROM (program ROM)” revised
Address “1ZZZZh” added.
NOTE revised.
Part Number revised.
“Internal ROM” → “Internal ROM (program ROM)” revised.
“Data area” → “Data flash”
“program area” → “program ROM” revised
Address “1ZZZZh” added.
NOTE2 added.
Part Number revised.
001Ch:
0024h:
NOTES revised.
“~ after Hardware reset” → “~ after reset” revised.
NOTES revised.
“When a capacitor is ~ or more.” added.
NOTES revised.
The LVD1ON bit in the OFS register can select to~ “after a reset”
added.
VCA2 register revised.
00h → 00h, 1000000b
TBD → Value when shipping
C - 2
Description
Summary
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