R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 546

• Manufacturer Part Number: R5F21238DFP#U0
• Description: IC R8C/23 MCU FLASH 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/23r

Specifications of R5F21238DFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Peripherals: POR, Voltage Detect, WDT
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: I2C/UART
• Total Internal Ram Size: 3KB
• # I/os (max): 41
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Rev.
1.10
REVISION HISTORY
Oct 31, 2007
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14.2.5 revised and 14.2.5.1 added.
14.2.5.2 added.
14.2.5.3 added.
14.2.5.4 added.
Figure 14.33; “input capture signal” added.
Figure 14.46 revised.
Table 14.25; Count Stop Conditions revised.
Table 14.27; Count Stop Conditions revised.
Table 14.29; Count Stop Conditions revised.
Figure 14.84; NOTE1 revised.
Table 14.33; Count Stop Conditions revised.
14.3.12.1 and Table 14.36 revised.
Figure 15.3; Registers U0BRG and U1BRG:
“U0BRG” → “UiBRG”
Table 15.1; NOTE2 revised.
Table 15.4; NOTE1 revised.
Table 15.5; NOTE2 added.
Figure 15.10 revised.
15.3; the fourth line from the top added.
Figure 16.4; NOTE2 deleted.
Figure 16.5; NOTE1 deleted.
Figure 16.6; NOTE2 and NOTE7 revised.
Figure 16.7; NOTE5 revised.
Figure 16.8; SSTDR NOTE1 and SSRDR NOTE2 deleted.
16.2.8.1 deleted.
Figure 16.24; NOTE6 revised.
Figure 16.25; NOTE5 deleted.
Figure 16.26; NOTE3 revised and NOTE7 deleted.
Figure 16.27; NOTE3 deleted.
Figure 16.28; NOTE7 revised.
Figure 16.32 revised.
Figure 16.33 and Figure 16.34 revised.
Figure 16.35 revised.
Figure 16.36 revised.
16.3.8.1 replaced and 16.3.8.2 added.
Figure 17.5; Procedure of Hardware LIN Clear the status flags:
“LINST register ← 0” → “LINST register ← 1”
Figure 17.7 revised.
R8C/22 Group, R8C/23 Group Hardware Manual
C - 23
Description
Summary