R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 489
R5F21238DFP#U0
Manufacturer Part Number
R5F21238DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Specifications of R5F21238DFP#U0
Core Size
16/32-Bit
Program Memory Size
64KB (64K x 8)
Peripherals
POR, Voltage Detect, WDT
Core Processor
R8C
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Number Of I /o
41
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
I2C/UART
Total Internal Ram Size
3KB
# I/os (max)
41
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 489 of 551
- Download datasheet (6Mb)
R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
22. Usage Notes
22.1
22.1.1
22.1.2
22.1.3
22.1.4
When entering stop mode, set the FMR01 bit to “0” (CPU rewrite mode disabled) and the CM10 bit to “1” (stop
mode). An instruction queue pre-reads 4 bytes from the instruction which sets the CM10 bit in the CM1 register
to “1” (stop mode) and the program stops. Insert at least 4 NOP instructions following the JMP.B instruction
after the instruction which sets the CM10 bit to “1”.
• Example to enter stop mode
When entering wait mode, set the FMR01 bit to “0” (CPU rewrite mode disabled) and execute the WAIT
instruction. An instruction queue pre-reads 4 bytes from the WAIT instruction and the program stops. Insert at
least 4 NOP instructions after the WAIT instruction.
• Example to execute the WAIT instruction
Since the oscillation stop detection function cannot be used if the XIN clock frequency is less than 2 MHz, set
the OCD1 to OCD0 bits to 00b.
Ask the maker of the oscillator to specify the beat oscillation circuit constants on your system.
Notes on Clock Generation Circuit
Stop Mode
Wait Mode
Oscillation Stop Detection Function
Oscillation Circuit Constants
LABEL_001:
Page 467 of 501
BCLR
BSET
FSET
BSET
JMP.B
NOP
NOP
NOP
NOP
BCLR
FSET
WAIT
NOP
NOP
NOP
NOP
1,FMR0
0,PRCR
I
0,CM1
LABEL_001
1,FMR0
I
; CPU rewrite mode disabled
; Protect disabled
; Enable interrupt
; Stop mode
; CPU rewrite mode disabled
; Enable interrupt
; Wait mode
22. Usage Notes
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