R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 513
![IC R8C/23 MCU FLASH 48-LQFP](/photos/12/38/123822/r5f21238dfp_u0_sml.jpg)
R5F21238DFP#U0
Manufacturer Part Number
R5F21238DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Specifications of R5F21238DFP#U0
Core Size
16/32-Bit
Program Memory Size
64KB (64K x 8)
Peripherals
POR, Voltage Detect, WDT
Core Processor
R8C
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Number Of I /o
41
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
I2C/UART
Total Internal Ram Size
3KB
# I/os (max)
41
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
22.9
22.9.1
Table 22.5
NOTES:
Mode
EW0 During automatic erasing Any interrupt can be used
22.9.1.1
22.9.1.2
22.9.1.3
1. Do not use the address match interrupt while the command is executed because the vector of the
2. Do not use the non-maskable interrupt while block 0 is automatically erased because the fixed
Before entering CPU rewrite mode (EW0 mode), select 5 MHz or below for the CPU clock using the CM06 bit
in the CM0 register and the CM16 to CM17 bits in the CM1 register. This usage note is not needed for EW1
mode.
The following instructions cannot be used in EW0 mode because the flash memory internal data is referenced:
UND, INTO, and BRK instructions.
Table 22.5 lists the EW0 Mode Interrupts and Table 22.6 lists the EW1 Mode Interrupts.
address match interrupt is allocated on ROM.
vector is allocated block 0.
Notes on Flash Memory
Automatic writing
CPU Rewrite Mode
Operating Speed
Prohibited Instructions
EW0 Mode Interrupts
Interrupts
Status
Page 491 of 501
by allocating a vector to
RAM
When Maskable Interrupt
Acknowledged
Request is
Once an interrupt request is acknowledged,
the auto-programming or auto-erasing is
forcibly stopped immediately and resets the
flash memory. An interrupt process starts
after the fixed period and the flash memory
restarts. Since the block during the auto-
erasing or the address during the auto-
programming is forcibly stopped, the
normal value may not be read. Execute the
auto-erasing again and ensure the auto-
erasing is completed normally.
Since the watchdog timer does not stop
during the command operation, the
interrupt request may be generated. Reset
the watchdog timer regularly.
Detection and Voltage Monitor 2 Interrupt
When Watchdog Timer, Oscillation Stop
Request are Acknowledged
22. Usage Notes
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