R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 329

• Manufacturer Part Number: R5F21238DFP#U0
• Description: IC R8C/23 MCU FLASH 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/23r

Specifications of R5F21238DFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Peripherals: POR, Voltage Detect, WDT
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: I2C/UART
• Total Internal Ram Size: 3KB
• # I/os (max): 41
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 16.12
16.2.5
16.2.5.1
Figure 16.12 shows an Initialization in Clock Synchronous Communication Mode. Set the TE bit in the SSER
register to 0 (disables transmit) and the RE bit to 0 (disables receive) before data transmit / receive as an
initialization.
When communication mode and format are changed, set the TE bit to 0 and the RE bit to 0 before changing.
Setting the RE bit to 0 does not change the contents of the RDRF and ORER flags, and the contents of the
SSRDR register.
Clock Synchronous Communication Mode
Initialization in Clock Synchronous Communication Mode
Initialization in Clock Synchronous Communication Mode
Page 307 of 501
NOTE:
1. Write 0 after reading 1 to set the ORER bit to 0.
SSER register
SSCRH register
SSMR2 register
SSMR register
SSMR2 register
SSSR register
SSCRH register
SSER register
Set CKS0 to CKS2 bits
Set RSSTP bit
RE bit ← 1 (When receive)
TE bit ← 1 (When transmit)
Set RIE, TEIE and TIE bits
Start
End
SCKS bit ← 1
Set SOOS bit
CPHS bit ← 0
CPOS bit ← 0
Set MLS bit
ORER bit ← 0
SSUMS bit ← 0
Set MSS bit
RE bit ← 0
TE bit ← 0
(1)
16. Clock Synchronous Serial Interface