R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 149
![IC R8C/23 MCU FLASH 48-LQFP](/photos/12/38/123822/r5f21238dfp_u0_sml.jpg)
R5F21238DFP#U0
Manufacturer Part Number
R5F21238DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Specifications of R5F21238DFP#U0
Core Size
16/32-Bit
Program Memory Size
64KB (64K x 8)
Peripherals
POR, Voltage Detect, WDT
Core Processor
R8C
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Number Of I /o
41
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
I2C/UART
Total Internal Ram Size
3KB
# I/os (max)
41
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 149 of 551
- Download datasheet (6Mb)
R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
13.2
Table 13.3
NOTES:
Count Source
Count Operation
Period
Count Start Condition
Reset Condition of Watchdog
Timer
Count Stop Condition
Operation at the Time of
Underflow
Register, Bit
The count source of the watchdog timer is the low-speed on-chip oscillator clock when count source protection
mode is enabled. If the CPU clock stops when the program is out of control, the clock can be supplied to the
watchdog timer.
Table 13.3 lists the Watchdog Timer Specifications (with Count Source Protection Mode Enabled).
1. The WDTON bit cannot be changed by a program. When setting the WDTON bit, write 0 to the bit 0
2. Even if writing 0 to the CSPROINI bit in the OFS register, the CSPRO bit is set to 1. The CSPROINI
of the address 0FFFFh using a flash programmer.
bit cannot be changed by a program. When setting the CSPROINI bit, write 0 to the bit 7 of the
address 0FFFFh using a flash programmer.
Count Source Protection Mode Enabled
Watchdog Timer Specifications (with Count Source Protection Mode Enabled)
Item
Page 127 of 501
Low-speed on-chip oscillator clock
Decrement
Count value of watchdog timer (4096)
e.g. Period is approximately 32.8 ms when the low-speed on-chip
The WDTON bit
of the watchdog timer after reset.
• When the WDTON bit is set to 1 (watchdog timer is in stop state
• When the WDTON bit is set to 0 (watchdog timer starts
• Reset
• Write 00h to the WDTR register before writing FFh
• Underflow
None (the count does not stop in wait mode after the count starts. The
MCU does not enter stop mode)
Watchdog timer reset (refer to 5.5 Watchdog Timer Reset)
• When setting the CSPPRO bit in the CSPR register to 1 (count
• The following states are held in count source protection mode
Low-speed on-chip oscillator clock
automatically after reset)
The watchdog timer and prescaler start counting automatically after
reset
after reset)
starts by writing to the WDTS register
source protection mode is enabled)
automatically
- Set 0FFFh to the watchdog timer
- Set the CM14 bit in the CM1 register to 0 (low-speed on-chip
- Set the PM12 bit in the PM1 register to 1 (The watchdog timer is
The watchdog timer and prescaler stop after reset and the count
- Writing to the CM14 bit in the CM1 register disables (It remains
- Writing to the CM10 bit in the CM1 register disables (It remains
unchanged even if it is set to 1. The MCU does not enter stop
mode)
unchanged even if it is set to 1. The low-speed on-chip oscillator
does not stop)
oscillator on)
reset when watchdog timer underflows)
oscillator clock is 125 kHz
(1)
in the OFS register (0FFFFh) selects the operation
Specification
(2)
, the following are set
13. Watchdog Timer
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