MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 93
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MPC8313ECZQADDC
Manufacturer Part Number
MPC8313ECZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB ENC EXT
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313ECZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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1.2.5.1
The PCI controller contains a PCI bus arbitration unit, which eliminates the need for an external unit, thus
lowering system complexity and cost. It has the following features:
1.2.6
The USB 2.0 controller offers operation as a host or device. The USB controller provides point-to-point
connectivity, which complies with the Universal Serial Bus Revision 2.0 Specification. The USB controller
can be configured to operate as a stand-alone host or stand-alone device. See
information.
The host and device functions are both configured to support the following four types of USB transfers:
Freescale Semiconductor
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controller is the fourth member of the arbitration pool.
The bus arbitration unit allows fairness as well as a priority mechanism.
A two-level round-robin scheme is used in which each device can be programmed within a pool of
a high- or low-priority arbitration. One member of the low-priority pool is promoted to the
high-priority pool. As soon as it is granted the bus, it returns to the low-priority pool.
The unit can be disabled to allow a remote arbitration unit to be used.
The unit can be isolated to allow power shut off of external devices.
Bulk
Control
Interrupt
Isochronous
Supports three REQ/GNT signal pairs, thus supporting three external masters. The device PCI
Universal Serial Bus (USB) 2.0
PCI Bus Arbitration Unit
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Figure 1-4. USB Controllers Port Configuration
Dual-Role
DR Mux
Module
(DR)
CSB
RX Buffer
TX Buffer
On-Chip PHY
Figure 1-4
for more
Overview
1-13
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