MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 229

Manufacturer Part Number

MPC8313ECZQADDC

Microprocessors - MPU 8313 REV2.2 PB ENC EXT

Manufacturer

Freescale Semiconductor

Processor Series

Data Bus Width

Maximum Clock Frequency

Program Memory Size

Data Ram Size

Interface Type

Mounting Style

Package / Case

Number Of Programmable I/os

Number Of Timers

The system I/O configuration register low (SICRL) controls the multiplexing of some of the device I/O

pins. Each bit or set of bits in the SICRL selects which function is used by a certain group of the device

pin used in this option. Some groups have only two options (shown as Pin Function 0 and Pin Function 1)

and therefore, only one control bit. In this case they can only have a value of 0b0 or 0b1. Other groups may

have four options (shown as Pin Function 0, Pin Function 1, Pin Function 2, and Pin Function 3) and

therefore, two control bits. In this case they can have a value of 0b00, 0b01, 0b10, or 0b11. Use the

notations ‘0bN’ or ‘0bNN’ according to whether a group has one or two control bits, respectively.

Freescale Semiconductor

Offset 0x00114

defines the bit fields of SICRL. Each Pin Function column lists the name of the multi-function

shows SICRL.

System I/O Configuration Register Low (SICRL)

MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2

Pin Function 0

Figure 5-14. System I/O Configuration Register Low (SICRL)

Table 5-28. SICRL Bit Settings

Pin Function 1

Depends on RCW

Pin Function 2

Pin Function 3

System Configuration

Access: Read/Write