MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 1145
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MPC8313ECZQADDC
Manufacturer Part Number
MPC8313ECZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB ENC EXT
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313ECZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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SPIM bit enables and clearing a SPIM bit masks the corresponding interrupt. Unmasked SPIE bits must
be cleared before the core clears its internal interrupt requests.
Table 19-6
Freescale Semiconductor
Offset 0x028
Reset
24–31
0–16
Bits
17
18
19
20
21
22
23
W
R
0
Name
MME
DNR
OV
UN
NE
NF
—
LT
—
describes the SPIM fields.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Last character transmitted
0 LT event will not cause an SPI interrupt
1 LT event causes an SPI interrupt
In slave mode data not ready
0 Slave DNR event will not cause an SPI interrupt
Note: 1Slave DNR event causes an SPI interrupt
Slave/Master Overrun interrupt mask
0 Slave/Master Overrun event will not cause an SPI interrupt
1 Slave/Master Overrun event causes an SPI interrupt
Slave Underrun interrupt mask
0 Slave Underrun event will not cause an SPI interrupt
1 Slave Underrun event causes an SPI interrupt
Multimaster error interrupt mask
0 Multimaster error event will not cause an SPI interrupt
1 Multimaster error event causes an SPI interrupt
Not Empty interrupt mask
0 Not Empty event will not cause an SPI interrupt
1 Not Empty event causes an SPI interrupt
Not Full interrupt mask
0 Not Full event will not cause an SPI interrupt
1 Not Full event causes an SPI interrupt
Reserved, should be cleared.
Reserved, should be cleared.
—
Figure 19-8. SPIM—SPI Mask Register Definition
Table 19-6. SPIM Field Descriptions
16 17
All zeros
LT DNR OV UN MME NE NF
Description
18
19
20
21
22
23
24
Serial Peripheral Interface
Access: Read/write
—
19-13
31
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