MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 515
MPC8313ECZQADDC
Manufacturer Part Number
MPC8313ECZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB ENC EXT
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313ECZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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An example of minimum delay command timing appears in
and hold timing of command, address, and write data cycles with respect to LFWE assertion are all
identical, and that the minimum cycle extends for two LCLK clock cycles.
An example of relaxed command timing is shown in
10.4.3.3.3
Instructions CW0, CW1, RBW, and RSW force FCM to observe the state of the LFRB pin, which may be
driven low by a long-latency NAND Flash operation, such as a page read. Following the issue of such
commands, FCM waits as shown in
observing LFRB before it has been properly driven low by the device, but does not preclude LFRB from
remaining high after a command. In addition, FCM samples and compares the state of LFRB on two
consecutive cycles of LCLK to filter out noise on this signal as it rises to the ready state (LFRB = 1).
Freescale Semiconductor
LCLK
(unused)
LFCLE
LFALE
LFWE
LAD[0:7]
TA
Figure 10-52. Example of FCM Command and Address Timing with Minimum Delay Parameters
Figure 10-53. Example of FCM Command and Address Timing with Relaxed Parameters
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
FCM Ready/Busy Timing
LCLK
(unused)
LFCLE
LFALE
LFWE
LAD[0:7]
TA
(for TRLX = 0, CHT = 0, CST = 0, SCY = 0, CLKDIV = 4*N)
(for TRLX = 1, CHT = 0, CST = 1, SCY = 2, CLKDIV = 4*N)
command
2×SCY = 4 cycles
Figure 10-54
command
before sampling the state of LFRB. This guards against
address 0
Figure
Figure
10-53.
address 1
10-52. Note that the set-up, wait-state,
address 2
Enhanced Local Bus Controller
address
10-67
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