MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 803

• Manufacturer Part Number: MPC8313ECZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB ENC EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ECZQADDC

• Processor Series: MPC8313E
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

15.5.3.6.12 Receive Broadcast Packet Counter (RBCA)
Figure 15-63
Table 15-67
15.5.3.6.13 Receive Control Frame Packet Counter (RXCF)
Figure 15-64
Table 15-68
Freescale Semiconductor
16–31
10–31
0–15
Bits
Bits
0–9
Offset eTSEC1:0x2_46AC; eTSEC2:0x2_56AC
Reset
Offset eTSEC1:0x2_46B0; eTSEC2:0x2_56B0
Reset
W
W
R
R
Name
RXCF
Name
RBCA
0
0
—
—
describes the fields of the RBCA register.
describes the fields of the RXCF register.
describes the definition for the RBCA register.
describes the definition for the RXCF register.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Reserved
Receive control frame packet counter. Increments for each MAC control frame received (PAUSE and
unsupported) with valid CRC and of lengths 64 to 1518 (non VLAN) or 1522 (VLAN).
Reserved
to 1518 (non VLAN) or 1522 (VLAN), excluding multicast frames. Does not include range/length errors.
Receive broadcast packet counter. Increments for each broadcast frame with valid CRC and of lengths 64
Figure 15-64. Receive Control Frame Packet Counter Register Definition
Figure 15-63. Receive Broadcast Packet Counter Register Definition
—
—
Table 15-67. RBCA Field Descriptions
Table 15-68. RXCF Field Descriptions
9
10
All zeros
All zeros
15 16
Description
Description
RBCA
Enhanced Three-Speed Ethernet Controllers
RXCF
Access: Read/Write
Access: Read/Write
15-85
31
31