MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 375

• Manufacturer Part Number: MPC8313ECZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB ENC EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ECZQADDC

• Processor Series: MPC8313E
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Table 8-15
Freescale Semiconductor
24–25 SYSA0T SYSA0 priority position IPIC output interrupt type. Defines which type of the IPIC output interrupt signal ( int ,
26–27 SYSA1T Same as SYSA0T, but for SYSA1T
28–31
Offset 0x28
4–23
Reset
Bits
0–1
2–3
W
R
SYSD0T SYSD1T
SYSD0T SYSD0 priority position IPIC output interrupt type.Defines which type of the IPIC output interrupt signal ( int ,
SYSD1T Same as SYSD0T, but for SYSD1T.
0
Name
—
—
defines the bit fields of SICNR.
1
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
cint , or smi ) asserts its request to the core in the SYSD0 priority position. These bits cannot be changed
dynamically. (to change it, software must make sure the corresponding interrupt source is masked or it cannot
happen during the change).
The definition of SYSD0T is as follows:
00 int request is asserted to the core for SYSD0.
01 smi request is asserted to the core for SYSD0.
10 cint request is asserted to the core for SYSD0.
11 Reserved
Write ignored, read = 0
smi , or cint ) asserts its request to the core in the SYSA0 priority position. These bits can not be changed
dynamically. (If s/w really wants to change it, it has to make sure the corresponding interrupt source is masked
or it won’t happen during the change).
The definition of SYSA0T is as follows:
00 int request is asserted to the core for SYSA0.
01 smi request is asserted to the core for SYSA0.
10 cint request is asserted to the core for SYSA0.
11 Reserved.
Write ignored, read = 0
2
3
Figure 8-10. System Internal Interrupt Control Register (SICNR)
4
Table 8-15. SICNR Field Descriptions
—
All zeros
Description
Integrated Programmable Interrupt Controller (IPIC)
23
SYSA0T SYSA1T
24
25
Access: Read write
26
27
28
—
8-17
31