MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 21
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MPC8313ECZQADDC
Manufacturer Part Number
MPC8313ECZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB ENC EXT
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313ECZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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Paragraph
Number
14.1.2.2
14.1.2.3
14.1.3
14.1.4
14.1.4.1
14.1.4.2
14.2
14.3
14.3.1
14.3.2
14.3.2.1
14.3.2.2
14.3.3
14.3.4
14.3.5
14.4
14.4.1
14.4.1.1
14.4.1.2
14.4.1.3
14.4.1.4
14.4.1.5
14.4.1.6
14.4.1.7
14.4.1.8
14.4.1.9
14.4.1.10
14.4.1.11
14.4.2
14.4.2.1
14.4.2.2
14.4.2.3
14.4.2.4
14.4.2.5
14.4.2.6
14.4.2.7
14.4.2.8
14.4.2.9
14.4.2.10
14.4.2.11
14.4.2.12
Freescale Semiconductor
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Configuration of Internal Memory Space ...................................................................... 14-8
Descriptor Overview.................................................................................................... 14-10
Execution Units............................................................................................................ 14-19
Channel ...................................................................................................................... 14-6
SEC Controller........................................................................................................... 14-7
Descriptor Structure ................................................................................................. 14-11
Descriptor Format: Header Dword .......................................................................... 14-11
Descriptor Format: Pointer Dwords......................................................................... 14-15
Link Table Format ................................................................................................... 14-16
Descriptor Types ...................................................................................................... 14-18
Data Encryption Standard Execution Unit (DEU)................................................... 14-19
Message Digest Execution Unit (MDEU) ............................................................... 14-28
Advanced Encryption Standard Execution Unit (AESU)...................................... 14-5
Message Digest Execution Unit (MDEU) ............................................................. 14-5
Channel-Controlled Access ................................................................................... 14-7
Host-Controlled Access ......................................................................................... 14-8
Selecting Execution Units—EU_SEL0 and EU_SEL1 ....................................... 14-13
Selecting Descriptor Type—DESC_TYPE ......................................................... 14-14
DEU Mode Register (DEUMR) .......................................................................... 14-19
DEU Key Size Register (DEUKSR).................................................................... 14-20
DEU Data Size Register (DEUDSR)................................................................... 14-21
DEU Reset Control Register (DEURCR)............................................................ 14-22
DEU Status Register (DEUSR) ........................................................................... 14-23
DEU Interrupt Status Register (DEUISR) ........................................................... 14-24
DEU Interrupt Control Register (DEUICR) ........................................................ 14-25
DEU End-of-Message Register (DEUEMR)....................................................... 14-27
DEU IV Register (DEUIV) ................................................................................. 14-27
DEU Key Registers (DEUKn)............................................................................. 14-28
DEU FIFOs .......................................................................................................... 14-28
MDEU Mode Register (MDEUMR) ................................................................... 14-28
Recommended Settings for MDEUMR............................................................... 14-31
MDEU Key Size Register (MDEUKSR) ............................................................ 14-32
MDEU Data Size Register (MDEUDSR)............................................................ 14-32
MDEU Reset Control Register (MDEURCR)..................................................... 14-33
MDEU Status Register (MDEUSR) .................................................................... 14-34
MDEU Interrupt Status Register (MDEUISR).................................................... 14-35
MDEU Interrupt Control Register (MDEUICR) ................................................. 14-36
MDEU ICV Size Register ................................................................................... 14-37
MDEU End-of-Message Register (MDEUEMR)................................................ 14-38
MDEU Context Registers .................................................................................... 14-38
MDEU Key Registers .......................................................................................... 14-39
Contents
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