R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 947
![IC SUPERH MPU ROMLESS 436-BGA](/photos/28/62/286211/436-bfbga_sml.jpg)
R8A77850ANBGV
Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77850AADBGV.pdf
(1694 pages)
Specifications of R8A77850ANBGV
Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 947 of 1694
- Download datasheet (9Mb)
19.3.48 Color Palette 1 Register 000 to 255 (CP1_000R to CP1_255R)
The color palette 1 registers 000 to 255 (CP1_000R to CP1_255R) are a group of 256 registers
which set six bits for each of the RGB components of a color, and are used as a color palette
capable of displaying 256 colors among 260,000 possible colors. Bits 31 to 24 are used as a blend
ratio. The values are valid for 8 bits/pixel data display.
For details of color palette operation, refer to section 19.4.8, Color Palettes.
Values are retained during power-on reset and manual reset.
Internal update:
Internal update:
Bit
31 to 24
23 to 18
17, 16
15 to 10
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
Bit Name
CP1_000A to
CP1_255A
CP1_000R to
CP1_255R
⎯
CP1_000G to
CP1_255G
R/W
R/W
31
15
—
—
O
O
R/W
R/W
30
14
—
—
O
O
CP1_000G to CP1_255G
Initial
Value
Undefined R/W
Undefined R/W
All 0
Undefined R/W
R/W
R/W
29
—
13
—
O
O
CP1_000A to CP1_255A
R/W
R/W
28
12
—
—
O
O
R/W
R
R/W
R/W
27
11
—
—
O
O
R/W
R/W
26
10
—
—
Internal
Update
Yes
Yes
⎯
Yes
O
O
R/W
25
—
—
O
R
9
0
R/W
Description
Color Palette 1_000 to 255 Blending Ratio
To enable this bit, the ABRE bit in DEFR
should be set to 1. In the initial state, this bit is
not enabled.
When the PnBRSL bits in PnALPHAR are 10,
the value is the alpha value, which is the blend
ratio.
Color Palette 1_000 to 255 Red
Red-color data of color palette 1 should be set.
Reserved
These bits are always read as 0. The write
value should always be 0.
Color Palette 1_000 to 255 Green
Green-color data of color palette 1 should be
set.
24
—
—
O
R
8
0
R/W
R/W
23
—
—
O
O
7
Rev.1.00 Jan. 10, 2008 Page 915 of 1658
R/W
R/W
22
—
—
O
O
6
CP1_000R to CP1_255R
CP1_000B to CP1_255B
R/W
R/W
21
—
—
O
O
5
R/W
R/W
20
—
—
O
O
4
R/W
R/W
19. Display Unit (DU)
19
—
—
O
O
3
REJ09B0261-0100
R/W
R/W
18
—
—
O
O
2
17
—
—
R
R
0
1
0
16
—
—
R
R
0
0
0
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