R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 485

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Table 11.19 Register Settings for Divided-Up DACKn Output in DMA1 Transfer Using the
Note: "⎯" means an arbitrary setting value. When transfer is done in a single bus cycle, DACKn
Bus Width
[Bit]
8
16
32
64
is not divided up because DACKn is output once in DMA1 transfer.
Access Size in
DMA Transfer
Byte
Word
Longword
16 bytes
32 bytes
Byte
Word
Longword
16 bytes
32 bytes
Byte
Word
Longword
16 bytes
32 bytes
Byte
Word
Longword
16 bytes
32 bytes
SRAM/Burst ROM/Byte Control SRAM Interfaces
Bus Cycle
Number
1
2
4
32
1
1
2
16
1
1
1
8
1
1
1
4
16
8
4
4
IWRRD, IWRRS, or
IWW in CSnBCR
⎯
⎯
⎯
B'000
⎯
⎯
⎯
⎯
B'000
⎯
⎯
⎯
⎯
B'000
⎯
⎯
⎯
⎯
B'000
⎯
Not Divided
Rev.1.00 Jan. 10, 2008 Page 453 of 1658
11. Local Bus State Controller (LBSC)
ADS and ADH in
CSnWCR.
⎯
B'000
B'000
B'000
B'000
⎯
⎯
B'000
B'000
B'000
⎯
⎯
⎯
B'000
B'000
⎯
⎯
⎯
B'000
B'000
REJ09B0261-0100
Divided
ADS and ADH
inCSnWCR
Undividable
B'111 to B'001
B'111 to B'001
B'111 to B'001
B'111 to B'001
Undividable
Undividable
B'111 to B'001
B'111 to B'001
B'111 to B'001
Undividable
Undividable
Undividable
B'111 to B'001
B'111 to B'001
Undividable
Undividable
Undividable
B'111 to B'001
B'111 to B'001