R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1000

IC SUPERH MPU ROMLESS 436-BGA

R8A77850ANBGV

Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850ANBGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
19. Display Unit (DU)
19.6
When executing the power-down sequence by the following modes or functions, turn off the
display in advance.
1. Sleep mode
2. Deep sleep mode
3. Module standby
4. Change of frequency
5. Manual reset
Even when the display unit (DU) enters the power-down sequence, the register values are retained.
During a power-down sequence, do not access the display unit (DU).
19.6.1
1. Display is turned off by setting both the DEN and DRES bits in DSYSR to 0.
2. Use the VBK bit in DSSR to confirm the next VBK flag (because the display is turned off with
3. The display unit (DU) displays the data in DOOR before the display is turned off.
4. Execute the power-down sequence.
5. Display unit (DU) is turned off.
19.6.2
1. Reset the power-down sequence and start the clock.
2. Make settings to turn the display on, with the DEN and DRES bits in DSYSR set to 1 and 0
Rev.1.00 Jan. 10, 2008 Page 968 of 1658
REJ09B0261-0100
the timing of VBK).
respectively.
Power-Down Sequence
Procedures before Executing the Power-Down Sequence
Resetting the Power-Down Sequence

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