R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1408

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

27. NAND Flash Memory Controller (FLCTL)
27.6
The FLCTL has four interrupt sources. Each of the interrupt sources has its corresponding
interrupt flag. The interrupt request is generated independently if the interrupt is enabled by the
interrupt enable bit. The status error and ready/busy timeout error use the common FLSTE
interrupt.
Table 27.6 FLCTL Interrupt Requests
27.7
The FLCTL can request DMA transfers separately to the data sector, FLDTFIFO, and control
code sector, FLECFIFO. Table 27.7 shows whether DMA transfer is enabled or disabled in each
access mode.
Table 27.7 DMA Transfer Settings
For details on DMAC settings, see section 14, Direct Memory Access Controller (DMAC).
Rev.1.00 Jan. 10, 2008 Page 1376 of 1658
REJ09B0261-0100
Interrupt Source
FLSTE interrupt
FLTEND interrupt
FLTRQ0 interrupt
FLTRQ1 interrupt
FLDTFIFO
FLECFIFO
Interrupt Processing
DMA Transfer Settings
Sector Access Mode
Enabled
Enabled
Interrupt Flag
STERB
BTOERB
TREND
TRREQF0
TRREQF1
Enable Bit
STERINTE
RBERINTE
TEINTE
TRINTE0
TRINTE1
Command Access Mode
Enabled
Disabled
Transfer end
Description
Status error
Ready/busy timeout error
FIFO0 transfer request
FIFO1 transfer request