R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 26

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

23.2 Input/Output Pins............................................................................................................. 1153
23.3 Register Descriptions....................................................................................................... 1153
23.4 Operation ......................................................................................................................... 1165
Section 24 Multimedia Card Interface (MMCIF)
24.1 Features............................................................................................................................ 1171
24.2 Input/Output Pins............................................................................................................. 1172
24.3 Register Descriptions....................................................................................................... 1173
24.4 Operation ......................................................................................................................... 1209
Rev.1.00 Jan. 10, 2008 Page xxiv of xxx
REJ09B0261-0100
23.3.1
23.3.2
23.3.3
23.3.4
23.3.5
23.4.1
23.4.2
23.4.3
23.4.4
23.4.5
23.4.6
23.4.7
23.4.8
24.3.1
24.3.2
24.3.3
24.3.4
24.3.5
24.3.6
24.3.7
24.3.8
24.3.9
24.3.10 Mode Register (MODER)................................................................................. 1196
24.3.11 Command Type Register (CMDTYR).............................................................. 1197
24.3.12 Response Type Register (RSPTYR)................................................................. 1198
24.3.13 Transfer Block Number Counter (TBNCR) ..................................................... 1202
24.3.14 Response Registers 0 to 16, D (RSPR0 to RSPR16, RSPRD).......................... 1203
24.3.15 Data Timeout Register (DTOUTR) .................................................................. 1205
24.3.16 Data Register (DR) ........................................................................................... 1206
24.3.17 FIFO Pointer Clear Register (FIFOCLR) ......................................................... 1207
24.3.18 DMA Control Register (DMACR) ................................................................... 1208
Control Register (SPCR) .................................................................................. 1155
Status Register (SPSR) ..................................................................................... 1158
System Control Register (SPSCR) ................................................................... 1161
Transmit Buffer Register (SPTBR) .................................................................. 1163
Receive Buffer Register (SPRBR).................................................................... 1164
Operation Overview with FIFO Mode Disabled............................................... 1165
Operation with FIFO Mode Enabled ................................................................ 1166
Timing Diagrams .............................................................................................. 1167
HSPI Software Reset ........................................................................................ 1169
Clock Polarity and Transmit Control................................................................ 1169
Transmit and Receive Routines ........................................................................ 1169
Flags and Interrupt Timing ............................................................................... 1170
Low-Power Consumption and Clock Synchronization..................................... 1170
Command Registers 0 to 5 (CMDR0 to CMDR5)............................................ 1177
Command Start Register (CMDSTRT) ............................................................ 1178
Operation Control Register (OPCR)................................................................. 1179
Card Status Register (CSTR)............................................................................ 1181
Interrupt Control Registers 0 to 2 (INTCR0 to INTCR2)................................. 1183
Interrupt Status Registers 0 to 2 (INTSTR0 to INTSTR2) ............................... 1187
Transfer Clock Control Register (CLKON) ..................................................... 1193
Command Timeout Control Register (CTOCR)............................................... 1194
Transfer Byte Number Count Register (TBCR) ............................................... 1195
..................................................... 1171