R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1072
![IC SUPERH MPU ROMLESS 436-BGA](/photos/28/62/286211/436-bfbga_sml.jpg)
R8A77850ANBGV
Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77850AADBGV.pdf
(1694 pages)
Specifications of R8A77850ANBGV
Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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21. Serial Communication Interface with FIFO (SCIF)
21.3
The SCIF has the following registers. Since the register functions are the same in each channel,
the channel number is omitted in the description below.
Table 21.2 Register Configuration (1)
Rev.1.00 Jan. 10, 2008 Page 1040 of 1658
REJ09B0261-0100
Ch.
0
1
Register Name
Serial mode register 0
Bit rate register 0
Serial control register 0
Transmit FIFO data register 0
Serial status register 0
Receive FIFO data register 0
FIFO control register 0
Transmit FIFO data count register 0 SCTFDR0
Receive FIFO data count register 0 SCRFDR0
Serial port register 0
Line status register 0
Serial error register 0
Serial mode register 1
Bit rate register 1
Serial control register 1
Transmit FIFO data register 1
Serial status register 1
Receive FIFO data register 1
FIFO control register 1
Transmit FIFO data count register 1 SCTFDR1
Receive FIFO data count register 1 SCRFDR1
Serial port register 1
Line status register 1
Serial error register 1
Register Descriptions
Abbrev.
SCSMR0
SCBRR0
SCSCR0
SCFTDR0
SCFSR0
SCFRDR0
SCFCR0
SCSPTR0
SCLSR0
SCRER0
SCSMR1
SCBRR1
SCSCR1
SCFTDR1
SCFSR1
SCFRDR1
SCFCR1
SCSPTR1
SCLSR1
SCRER1
R/W
R/W
R/W
R/W
W
R/W*
R
R/W
R
R
R/W
R/W*
R
R/W
R/W
R/W
W
R/W*
R
R/W
R
R
R/W
R/W*
R
1
2
1
2
P4 Address
H'FFEA 0000
H'FFEA 0004
H'FFEA 0008
H'FFEA 000C
H'FFEA 0010
H'FFEA 0014
H'FFEA 0018
H'FFEA 001C
H'FFEA 0020
H'FFEA 0024
H'FFEA 0028
H'FFEA 002C
H'FFEB 0000
H'FFEB 0004
H'FFEB 0008
H'FFEB 000C
H'FFEB 0010
H'FFEB 0014
H'FFEB 0018
H'FFEB 001C
H'FFEB 0020
H'FFEB 0024
H'FFEB 0028
H'FFEB 002C
Area 7 Address
H'1FEA 0000
H'1FEA 0004
H'1FEA 0008
H'1FEA 000C
H'1FEA 0010
H'1FEA 0014
H'1FEA 0018
H'1FEA 001C
H'1FEA 0020
H'1FEA 0024
H'1FEA 0028
H'1FEA 002C
H'1FEB 0000
H'1FEB 0004
H'1FEB 0008
H'1FEB 000C
H'1FEB 0010
H'1FEB 0014
H'1FEB 0018
H'1FEB 001C
H'1FEB 0020
H'1FEB 0024
H'1FEB 0028
H'1FEB 002C
Size
16
8
16
8
16
8
16
16
16
16
16
16
16
8
16
8
16
8
16
16
16
16
16
16
Sync
Clock
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
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