R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 840
![IC SUPERH MPU ROMLESS 436-BGA](/photos/28/62/286211/436-bfbga_sml.jpg)
R8A77850ANBGV
Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77850AADBGV.pdf
(1694 pages)
Specifications of R8A77850ANBGV
Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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18. Timer Unit (TMU)
Rev.1.00 Jan. 10, 2008 Page 808 of 1658
REJ09B0261-0100
Bit
7
6
5
4
3
Bit Name
ICPE1*
ICPE0*
UNIE
CKEG1
CKEG0
1
1
Initial
Value
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Input Capture Control
These bits, provided in channel 2 only, specify whether
the input capture function is used, and control enabling
or disabling of interrupt generation when the function is
used.
The CKEG bits specify whether the rising edge or falling
edge of the TCLK pin is used to set the TCNT2 value in
TCPR2.
The TCNT2 value is set in TCPR2 only when the ICPF
bit in TCR2 is 0. When the ICPF bit is 1, TCPR2 is not
set in the event of input capture.
00: Input capture function is not used.
01: Reserved (setting prohibited)
10: Input capture function is used, but interrupt due to
11: Input capture function is used, and interrupt due to
Underflow Interrupt Control
Controls enabling or disabling of interrupt generation
when the UNF status flag is set to 1, indicating TCNT
underflow.
0: Interrupt due to underflow (TUNI) is disabled
1: Interrupt due to underflow (TUNI) is enabled
Clock Edge 1 and 0
These bits select the external clock input edge when an
external clock that is input from the TCLK pin is selected
or the input capture function is used.
00: Count/input capture register set on rising edge
01: Count/input capture register set on falling edge
1X: Count/input capture register set on both rising and
input capture (TICPI2) is not enabled.
input capture (TICPI2) is enabled.
falling edges
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