R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 568

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

12. DDR2-SDRAM Interface (DBSC2)
example is shown in section 12.5.11, Method for Securing Time Required for Initialization, Self-
Refresh Cancellation, etc.
(2)
Figure 12.14 shows the relation between the settings of CL, tRAS, tRCD, and tRP, and the issuing
of commands. Figure 12.15 shows the relation to tRRD and tRTP, figure 12.16 shows the relation
to tWR, figure 12.17 shows the relation to tRC, figure 12.18 shows the relation to READ-WRITE,
figure 12.19 shows the relation to WRITE-READ, and figure 12.20 shows the relation to tRFC.
Figure 12.14 corresponds to operation in a case in which, with bank A open, there is read access of
bank A and a page miss occurs. The constraint tRP between the PRE command and ACT
Rev.1.00 Jan. 10, 2008 Page 536 of 1658
REJ09B0261-0100
MCK0,
MCK1
MCKE
MCS
MRAS
MCAS
MWE
MA[14:11]
MA[9:0]
MA[10]
MBA[2:0]
MDQS[3:0]
MDM[3:0]
MDQ[31:0]
Regarding Timing Constraints
SDRAM
command
Invalid
PALL
Figure 12.13 Self-Refresh Operation
REF
SLFRSH
Invalid
Invalid
Invalid
Invalid
Invalid
Self-refresh in progress
RSHX
SLF
tXSNR
REF