R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1315

IC SUPERH MPU ROMLESS 436-BGA

R8A77850ANBGV

Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850ANBGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Note:
Bit
31 to 23
22
21
20
19
18 to 14
13
12
11 to 0
*
Bit Name
STARY
STDRY
PLRFRQ
PRRFRQ
PLRFOV
PRRFOV
This register is readable/writable. Writing 0 to the bit initializes it but writing 1 has no
effect.
Initial
Value
All 0
0
0
0
0
All 0
0
0
All 0
R/W*
R
R/W
R/W
R/W
R/W
R
R/W
R/W
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Status Address Ready
0: HACCSAR (status address) is not ready.
1: HACCSAR (status address) is ready.
Status Data Ready
0: HACCSDR (status data) is not ready.
1: HACCSDR (status data) is ready.
PCML RX Request
0: PCML RX data is not ready.
1: PCML RX data is ready and must be read. In DMA
PCMR RX Request
0: PCMR RX data is not ready.
1: PCMR RX data is ready and must be read. In DMA
Reserved
These bits are always read as 0. The write value should
always be 0.
PCML RX Overrun
0: No PCML RX data overrun has occurred.
1: PCML RX data overrun has occurred because the
PCMR RX Overrun
0: No PCMR RX data overrun has occurred.
1: PCMR RX data overrun has occurred because the
Reserved
These bits are always read as 0. The write value should
always be 0.
mode, reading HACPCML automatically clears this
bit to 0.
mode, reading HACPCMR automatically clears this
bit to 0.
HAC has received new data from slot 3 before PCML
data is not read out.
HAC has received new data from slot 4 before PCMR
data is not read out.
Rev.1.00 Jan. 10, 2008 Page 1283 of 1658
25. Audio Codec Interface (HAC)
REJ09B0261-0100

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