R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 67

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

(2)
The contents of SR are saved to SSR in the event of an exception or interrupt.
(3)
The address of an instruction at which an interrupt or exception occurs is saved to SPC.
(4)
GBR is referenced as the base address of addressing @(disp,GBR) and @(R0,GBR).
(5)
VBR is referenced as the branch destination base address in the event of an exception or interrupt.
For details, see section 5, Exception Handling.
(6)
The contents of R15 are saved to SGR in the event of an exception or interrupt.
(7)
When the user break debugging function is enabled (CBCR.UBDE = 1), DBR is referenced as the
branch destination address of the user break handler instead of VBR.
2.2.5
(1)
MACH and MACL are used for the added value in a MAC instruction, and to store the operation
result of a MAC or MUL instruction.
(2)
The return address is stored in PR in a subroutine call using a BSR, BSRF, or JSR instruction. PR
is referenced by the subroutine return instruction (RTS).
(3)
PC indicates the address of the instruction currently being executed.
Saved Status Register (SSR) (32 bits, Privileged Mode, Initial Value = Undefined)
Saved Program Counter (SPC) (32 bits, Privileged Mode, Initial Value = Undefined)
Global Base Register (GBR) (32 bits, Initial Value = Undefined)
Vector Base Register (VBR) (32 bits, Privileged Mode, Initial Value = H'00000000)
Saved General Register 15 (SGR) (32 bits, Privileged Mode, Initial Value = Undefined)
Debug Base Register (DBR) (32 bits, Privileged Mode, Initial Value = Undefined)
Multiply-and-Accumulate Registers (MACH and MACL) (32 bits, Initial Value =
Undefined)
Procedure Register (PR) (32 bits, Initial Value = Undefined)
Program Counter (PC) (32 bits, Initial Value = H'A0000000)
System Registers
Rev.1.00 Jan. 10, 2008 Page 35 of 1658
2. Programming Model
REJ09B0261-0100