R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 717
![IC SUPERH MPU ROMLESS 436-BGA](/photos/28/62/286211/436-bfbga_sml.jpg)
R8A77850ANBGV
Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77850AADBGV.pdf
(1694 pages)
Specifications of R8A77850ANBGV
Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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- Download datasheet (9Mb)
Bit
17
16
Bit Name
AM
AL
Initial
Value
0
0
R/W
R/W
R/W
Descriptions
Acknowledge Mode
Selects whether DACK is output in a data read cycle or
in a data write cycle. DACK is output only for LBSC
space transfers.
This bit is valid in only CHCR0 to CHCR3.
0: DACK output in a read cycle
1: DACK output in a write cycle
Acknowledge Level
Specifies whether the DACK signal output is high-active
or low-active. This bit is valid in only CHCR0 to CHCR3.
If DACK active direction has been changed, reflecting
the change on the external pins requires two cycles of
the external bus clock after writing to register is
completed.
0: DACK output low-active
1: DACK output high-active
(DACK is output only when the DMA transfer
(DACK is output only when the DMA transfer source
is LBSC space.)
destination is LBSC space.)
14. Direct Memory Access Controller (DMAC)
Rev.1.00 Jan. 10, 2008 Page 685 of 1658
REJ09B0261-0100
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