R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 779

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

15.4.4
PLLCR is a 32-bit readable/writable register that controls the clock output on the CLKOUT pin.
This register can only be accessed in longwords.
Initial value:
Initial value:
Bit
31 to 24
23 to 16
15 to 2
1
0
R/W:
R/W:
BIt:
BIt:
PLL Control Register (PLLCR)
Bit Name
⎯
⎯
⎯
CKOFF
⎯
31
15
⎯
⎯
R
R
0
0
30
14
⎯
⎯
R
R
0
0
29
13
⎯
⎯
R
R
0
0
Initial
Value
0
All 0
All 0
0
0
28
⎯
12
⎯
R
R
0
0
R/W
R
R/W
R
R/W
R
27
⎯
11
⎯
R
R
0
0
26
10
⎯
⎯
R
R
0
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Reserved
These bits are always read as 0. The write value
should always be 0. If a value other than 0 is written,
the operation is not guaranteed.
Reserved
These bits are always read as 0. The write value
should always be 0.
CLKOUT Output Enabled
Stops clock output on the CLKOUT pin
0: Clock is output on the CLKOUT pin
1: The CLKOUT pin is placed in the high impedance
Reserved
This bit is always read as 0. The write value should
always be 0.
25
⎯
⎯
state
R
R
0
9
0
24
⎯
⎯
R
R
0
8
0
R/W
23
⎯
⎯
R
0
7
0
Rev.1.00 Jan. 10, 2008 Page 747 of 1658
R/W
22
⎯
⎯
R
0
6
0
R/W
21
⎯
⎯
R
0
5
0
15. Clock Pulse Generator (CPG)
R/W
20
⎯
⎯
R
0
4
0
R/W
19
⎯
⎯
R
0
3
0
REJ09B0261-0100
R/W
18
⎯
⎯
R
0
2
0
CKOFF
R/W
R/W
17
⎯
0
1
0
R/W
16
⎯
⎯
R
0
0
0