R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1195
![IC SUPERH MPU ROMLESS 436-BGA](/photos/28/62/286211/436-bfbga_sml.jpg)
R8A77850ANBGV
Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77850AADBGV.pdf
(1694 pages)
Specifications of R8A77850ANBGV
Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 1195 of 1694
- Download datasheet (9Mb)
23.3.4
SPTBR is a 32-bit readable/writable register that stores data to be transmitted.
Initial value:
Initial value:
Bit
2
1
0
Bit
31 to 8
7 to 0
R/W:
R/W:
Bit:
Bit:
Transmit Buffer Register (SPTBR)
Bit Name
RXDE
TXDE
MASL
Bit Name
⎯
TD
31
15
—
—
R
R
0
0
30
14
—
—
R
R
0
0
Initial
Value
All 0
All 0
29
13
—
—
R
R
0
0
Initial
Value
0
0
0
28
—
12
—
R
R
0
0
R/W
R/W
R/W
R/W
R/W
R
R/W
27
—
11
—
R
R
0
0
26
10
—
—
R
R
0
0
Description
Receive DMA Enable
0: Receive DMA transfer request disabled
1: Receive DMA transfer request enabled
Transmit DMA Enable
0: Transmit DMA transfer request disabled
1: Transmit DMA transfer request enabled
Master/Slave Select Bit
0: HSPI module configured as a slave
1: HSPI module configured as a master
Description
Reserved
These bits are always read as an undefined value. The
write value should always be 0.
Data written to this register is transferred to the shift
register for transmission.
When reading these bits, the data stored in the transmit
buffer is always read.
Transmit Data
25
—
—
R
R
0
9
0
24
—
—
R
R
0
8
0
R/W
23
—
R
0
7
0
Rev.1.00 Jan. 10, 2008 Page 1163 of 1658
R/W
22
—
R
0
6
0
23. Serial Peripheral Interface (HSPI)
R/W
21
—
R
0
5
0
R/W
20
—
R
0
4
0
TD
R/W
19
—
R
0
3
0
REJ09B0261-0100
R/W
18
—
R
0
2
0
R/W
17
—
R
0
1
0
R/W
16
—
R
0
0
0
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