R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1342

IC SUPERH MPU ROMLESS 436-BGA

R8A77850ANBGV

Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850ANBGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
26. Serial Sound Interface (SSI) Module
Rev.1.00 Jan. 10, 2008 Page 1310 of 1658
REJ09B0261-0100
Bit
26
25
Bit Name
OIRQ
IIRQ
0
Initial
Value
1
R/W
R/W*
R
Description
Overflow Error Interrupt Status Flag
This status flag indicates that the data has been
supplied at a higher rate than the required rate.
This bit is set to 1 regardless of the setting of OIEN bit.
In order to clear it to 0, write 0 in it.
If OIRQ = 1 and OIEN = 1, then an interrupt will be
generated.
When TRMD = 0 (Receive Mode):
If OIRQ = 1, it indicates that the previous unread data
had not been read out before new unread data was
written in SSIRDR. This may cause the loss of data,
which can lead to destruction of multi-channel data.
Note: When overflow error occurs, the data in the data
buffer will be overwritten by the next data sent from the
SSI interface.
When TRMD = 1 (Transmit Mode):
If OIRQ = 1, it indicates that SSITDR had data written in
before the data in SSITDR was transferred to the shift
register. This may cause the loss of data, which can
lead to destruction of multi-channel data.
Idle Mode Interrupt Status Flag
This status flag indicates whether the SSI module is in
the idle status. This bit is set to 1 regardless of the
setting of IIEN bit, so that polling will be possible.
The interrupt can be masked by clearing the IIEN bit to
0, but writing 0 in this bit will not clear the interrupt.
If IIRQ = 1 and IIEN = 1, then an interrupt will be
generated.
0: The SSI module is not in the idle status.
1: The SSI module is in the idle status.
In the idle state, the serial bus operation is stopped
after the SSI module is activated.

Related parts for R8A77850ANBGV