R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 530

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

12. DDR2-SDRAM Interface (DBSC2)
Note: Writing to this register should be performed only when the following conditions are met.
Rev.1.00 Jan. 10, 2008 Page 498 of 1658
REJ09B0261-0100
Bit
3 to 0
•
•
Bit Name
WRRD0
WRRD3 to
When SDRAM access is disabled (when the ACEN bit in the DBEN register is 0.).
When automatic issue of auto-refresh is disabled (when the ARFEN bit in the
DBRFCNT0 register is cleared to 0.).
Initial
Value
0011
R/W
R/W
Description
WRITE-READ Command Minimum Interval Setting Bits
These bits set the WRITE-READ command minimum
interval constraint. These bits should be set according
to the SDRAM specifications. The number of cycles is
the number of DDR clock cycles.
0000: Setting prohibit (If specified, correct operation
0010: Setting prohibit (If specified, correct operation
0011: 4 cycles
0100: 5 cycles
1010: 11 cycles
1011: Setting prohibit (If specified, correct operation
1111: Setting prohibit (If specified, correct operation
:
:
:
cannot be guaranteed.)
cannot be guaranteed.)
cannot be guaranteed.)
cannot be guaranteed.)