DF2170VTE33 Renesas Electronics America, DF2170VTE33 Datasheet - Page 467
DF2170VTE33
Manufacturer Part Number
DF2170VTE33
Description
MCU 3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2170BVTE33V.pdf
(572 pages)
Specifications of DF2170VTE33
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
HD64F2170VTE33
HD64F2170VTE33
HD64F2170VTE33
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2170VTE33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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14.7.2
As the flash memory area to be emulated, bits RAM2 to RAM0 select one area among eight areas,
EB0 to EB7, in bank 1 of user MAT.
Figure 14.19 shows an example in which flash memory block area, EB1, is overlapped.
1. Set bits RAMS, RAM2, RAM1, and RAM0 in RAMER to 1, 0, 0, 1, to overlap part of RAM
2. Realtime programming is performed using the overlapping RAM.
3. After the program data has been confirmed, the RAMS bit is cleared, releasing RAM overlap.
4. The data written in the overlapping RAM is written into the flash memory space (EB1).
Notes: 1. When the RAMS bit is set to 1, program/erase-protection is enables for all flash
onto the area (EB1) for which realtime programming is required.
Figure 14.19 Example of RAM Overlap Operation (256-kbyte Flash Memory)
2. The RAM area cannot be erased by execution of software in accordance with the erase
3. Block area EB0 includes the vector table. When performing RAM emulation, the
RAM Overlap
memory blocks regardless of the value of RAM2, RAM1, and RAM0 (emulation
protection). When actually programming a flash memory area, the RAMS bit should
be cleared to 0.
algorithm while flash memory emulation in RAM is being used.
vector table is needed by the overlap RAM.
H'3FFFF
H'00000
H'01000
H'02000
H'03000
H'04000
H'05000
H'06000
H'07000
H'08000
Flash memor
EB8 to EB11
EB0
EB1
EB2
EB3
EB4
EB5
EB6
EB7
This area can be accessed
from both the RAM area
and flash memory area
On-chip RAM
Rev. 2.00, 03/04, page 433 of 534
H'FF7000
H'FF7FFF
H'FFEFFF
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