DF2170VTE33 Renesas Electronics America, DF2170VTE33 Datasheet - Page 450
![MCU 3V 256K 100-TQFP](/photos/28/61/286108/100-tqfp_sml.jpg)
DF2170VTE33
Manufacturer Part Number
DF2170VTE33
Description
MCU 3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2170BVTE33V.pdf
(572 pages)
Specifications of DF2170VTE33
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
HD64F2170VTE33
HD64F2170VTE33
HD64F2170VTE33
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2170VTE33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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The difference between the programming procedures in user program mode and user boot mode is
whether the MAT is switched or not as shown in figure 14.14.
In user boot mode, the user boot MAT can be seen in the flash memory space with the user MAT
hidden in the background. The user MAT and user boot MAT are switched only while the user
MAT is being programmed. Because the user boot MAT is hidden while the user MAT is being
programmed, the procedure program must be located in an area other than flash memory. After
programming completes, switch the MATs again to return to the first state.
MAT switching is enabled by writing a specific value to FMATS. However note that while the
MATs are being switched, the LSI is in an unstable state, e.g. access to a MAT is not allowed until
MAT switching is completed, and if an interrupt occurs, from which MAT the interrupt vector is
read is undetermined. Perform MAT switching in accordance with the description in section 14.6,
Switching between User MAT and User Boot MAT.
Rev. 2.00, 03/04, page 416 of 534
Figure 14.14 Procedure for Programming User MAT in User Boot Mode
JSR FTDAR setting + 32
Select on-chip program
to be downloaded and
and bus master operation
destination by FTDAR
Set the FPEFEQ and
Set SCO to 1 and
execute download
FUBRA parameters
Set FKEY to H'A5
specify download
procedure program
Clear FKEY to 0
Start programming
Disable interrupts
Initialization
other than CPU
DPFR = 0 ?
FPFR = 0 ?
1
Yes
Yes
Initialization error processing
Download error processing
No
No
User-boot-MAT
selection state
Note:
No
*
JSR FTDAR setting + 16
Set FMATS to value other than
ER1 (FMPAR and FMPDR)
Set parameter to ER0 and
Set FMATS to H'AA to
select user boot MAT
The MAT must be switched by FMATS
to perform the programming error
processing in the user boot MAT.
H'AA to select user MAT
Set FKEY to H'A5
procedure program
Clear FKEY to 0
End programming
Programming
programming is
Required data
FPFR = 0 ?
completed?
1
Yes
Yes
Clear FKEY and programming
No
error processing *
switchover
switchover
MAT
MAT
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